Backlight Driver with I/O Expander
ADP5520 Rev. A
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, N orwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 https://www.doczj.com/doc/4814358693.html, Fax: 781.461.3113 ?2008–2010 Analog Devices, Inc. All rights reserved.
FEATURES
Efficient asynchronous boost converter for driving up to
6 white LEDs
2.7 V to 5.5 V input voltage range
128 programmable backlight LED current levels (30 mA maximum)
Ambient light sensing with autonomous backlight adjustment
Programmable backlight fade-in/fade-out times Programmable backlight dim and off times
8 configurable GPIO pins (input, output, up to 4 × 4 keypad) Up to 3 auxiliary LED current sinks (1 dedicated, 2 configurable) 64 programmable auxiliary LED current levels (14 mA maximum)
Programmable auxiliary LED fade-in/fade-out times Programmable auxiliary LED on and off times (allows blinking)
I2C-compatible serial interface
Interrupt line for signaling an external processor (nINT) Hard reset (nRST)
Current limit protection
Thermal overload protection
Available in small 4.0 mm × 4.0 mm, 24-lead LFCSP package
APPLICATIONS
Display backlight driver for phones that require slider or flip keypad functions with single or multiple LED indicators TYPICAL OPERATING CIRCUIT
A B C D
E F G H
Figure 1.
GENERAL DESCRIPTION
The ADP5520 is a versatile single-chip, white LED backlight driver with a user configurable I/O expander. This device fits handset applications where the flip or slider section of the phone requires backlighting, I/O signaling and detecting, auxiliary LED lighting, and keypad functions. By incorporating an I2C?-compatible serial interface and a single line interrupt, the ADP5520 significantly reduces the total number of lines required to interface with the baseband processor across the hinge flex. The ADP5520 can detect ambient light levels and adjust the backlight brightness accordingly, resulting in extended battery operation.
Once configured, the ADP5520 is capable of controlling the flip/slider backlight intensity, on/off timing, dimming, and fading without the intervention of the main processor, which results in valuable battery power saving.
ADP5520
Rev. A | Page 2 of 40
TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Typical Operating Circuit ................................................................ 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 I 2C Timing Specifications ............................................................ 4 Absolute Maximum Ratings ............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Typical Performance Characteristics ............................................. 7 Theory of Operation ........................................................................ 9 Backlight Drive and Control ....................................................... 9 Backlight Operating Levels ....................................................... 10 Backlight Maximum and Dim Settings ................................... 10 Backlight Turn On/Off/Dim ..................................................... 11 Automatic Dim and Turn Off Timers ..................................... 11 Linear Backlight Fade In and Fade Out ................................... 12 Fade Override ............................................................................. 13 Advanced Fading (Square) ........................................................ 13 Advanced Fading (Cubic 1 and Cubic 2) ................................ 14 Ambient Light Sensing .............................................................. 14 Automatic Backlight Adjustment ............................................. 15 I/O Expansion Pins (GPIOs) .................................................... 15 I/O Expansion Pins (Keypad Matrix) ...................................... 15 I/O Expansion Pins and ILED Pin (Auxiliary LED Current Sinks) ............................................................................................ 17 Interrupt Output (nINT) ........................................................... 19 Reset Input (nRST) .................................................................... 19 Communication Interface ............................................................. 20 Register Map ................................................................................... 21 Detailed Register Descriptions ..................................................... 22 Applications Information .............................................................. 34 Converter Topology ................................................................... 34 PCB Layout ................................................................................. 35 Example Circuits ............................................................................ 36 Outline Dimensions ....................................................................... 38 Ordering Guide .. (38)
REVISION HISTORY
1/10—Rev. 0 to Rev. A
Changes to Table 1 ............................................................................ 3 Changes to Table 5 ............................................................................ 6 Changes to Figure 32 ...................................................................... 14 Updated Outline Dimensions ....................................................... 38 Changes to Ordering Guide .......................................................... 38 7/08—Revision 0: Initial Version
ADP5520
Rev. A | Page 3 of 40
SPECIFICATIONS
VBAT = 2.7 V to 4.8 V , T J = ?40°C to +125°C, unless otherwise noted.1 Table 1.
Parameter Symbol Conditions Min Typ Max Unit SUPPLY VOLTAGE VBAT Input Voltage Range V BAT 2.7 5.5 V VDDIO Input Voltage Range V VDDIO 1.7 3.32V Undervoltage Lockout Threshold UVLO VBAT VBAT falling 1.7 2.1 V UV L O VBAT VBAT rising 2.4 2.7 V UV L O VDDIO VDDIO falling 1.1 1.3 V UV L O VDDIO VDDIO rising 1.4 1.62 V SW leakage SW LEAKAGE 0.1 1 μA SUPPLY CURRENT
Shutdown Current 3
I SD VDDIO = 0 V 0.1 1 μA
Standby Current 4I STNBY 1.7 V ≤ VDDIO ≤ 3.3 V 2
, nSTNBY = 0
25 45 μA
BACKLIGHT LED DRIVER (SW, BST) Current Limit (Peak Inductor Current) 450 600 750 mA Switch On Resistance 100 200 400 mΩ Overvoltage Limit 24.5 27 29.5 V Boost Startup Time 1 ms BACKLIGHT LED CURRENT SINK (BL_SNK) Full-Scale Backlight Current 26 30 32 mA Backlight Current Ramp Rate Fade timers disabled 0.3 mA/ms AMBIENT LIGHT SENSOR (CMP_IN) Full-Scale Current BL FULLSCALE 0.7 1 1.2 mA
INPUT LOGIC LEVELS (SCL, SDA, nRST, C0, C1, C2, C3, R0, R1, R2, R3)5
Logic Low Input Voltage V IL 1.7 V ≤ VDDIO ≤ 3.3 V 2
0.3 × VDDIO V
Logic High Input Voltage V IH 1.7 V ≤ VDDIO ≤ 3.3 V 2
0.7 × VDDIO V
Input Leakage Current V I-LEAKAGE 1.7 V ≤ VDDIO ≤ 3.3 V 2
0.1 1 μA
INPUT LOGIC DEBOUNCE (nRST, C0, C1, C2, C3, R0, R1, R2, R3)6
V IL-DBNC 50 75 100 μs PUSH-PULL OUTPUT LOGIC LEVELS (C0, C1, C2, C3, R0, R1, R2, R3)7 Logic Low Output Voltage V OL I SINK = 1 mA 0.4 V Logic High Output Voltage V OH I SOURCE = 1 mA VDDIO ? 0.2 V OPEN-DRAIN OUTPUT LOGIC LEVELS (nINT, SDA) Logic Low Output Voltage V OL I SINK = 1 mA 0.4 V
Logic High Leakage Current V OH-LEAKAGE 1.7 V ≤ VDDIO ≤ 3.3 V 2
0.1 1 μA
AUX LED CURRENT SINK (ILED, C3, R3)8
eakage L ED LEAKAGE Sink disabled 0.1 1 μA Full-scale Current Sink LED FULLSCALE Applied pin voltage = 1 V 10.5 14 16.5 mA
GPIO PULL-UP RESISTANCE (C0, C1, C2, C3, R0, R1, R2, R3)9
50 65 80 kΩ THERMAL SHUTDOWN Thermal Shutdown Threshold TS T J rising 150 °C Thermal Shutdown Hysteresis TS HYS T J falling 10 °C
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Typical values are at T A = 25?C, VBAT = 3.6 V. 2
3.3 V or VBAT, whichever is smaller. 3
Internal LDO powered down, digital blocks inactive, I 2C inactive, boost inactive. 4
Internal LDO powered up, digital blocks active, I 2C active, boost inactive. 5
C0, C1, C2, C3, R0, R1, R2, and R3 are configured as digital inputs. 6
C0, C1, C2, C3, R0, R1, R2, and R3 are configured as digital inputs, with debounce enabled. 7
C0, C1, C2, C3, R0, R1, R2, and R3 are configured as digital outputs. 8
C3 and R3 are configured as digital inputs with pull-up. 9
C0, C1, C2, C3, R0, R1, R2, and R3 are configured as digital inputs with pull-up.
ADP5520
Rev. A | Page 4 of 40
I 2C TIMING SPECIFICATIONS
Table 2.
Parameter Description Min Max Unit Delay from Reset Deassertion to I 2C Access 60 μs f SCL SCL clock frequency 400 kHz t HIGH SCL high time 0.6 μs t LOW SCL low time 1.3 μs t SU, DAT Data setup time 100 ns t HD, DAT Data hold time 0 0.9 μs t SU, STA Setup time for repeated start 0.6 μs t HD, STA Hold time for start/repeated start 0.6 μs t BUF Bus free time for stop and start condition 1.3 μs t SU, STO Setup time for stop condition 0.6 μs t R Rise time for SCL and SDA 20 + 0.1 C B 300 ns t F Fall time for SCL and SDA 20 + 0.1 C B 300 ns t SP Pulse width of suppressed spike 0 50 μs C B 1Capacitive load for each bus line 400 pF
1
C B is the total capacitance of one bus line in picofarads.
SDA
SCL
S = START CONDITION
Sr = REPEATED START CONDITION P = STOP CONDITION
07445-002
Figure 2. I 2
C Interface Timing Diagram
ADP5520
Rev. A | Page 5 of 40
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
VBAT to GND ?0.3 V to +6 V VDDIO to GND ?0.3 V to VBAT SW, BST to GND ?0.3 V to +30 V ILED, R0, R1, R2, R3, C0, C1, C2, C3, CMP_IN, SCL, SDA, nINT, nRST, CAP_OUT, BL_SNK to GND ?0.3 V to +6 V PGND to GND ?0.3 V to +0.3 V
Operating Ambient Temperature Range ?40°C to +85°C 1 Operating Junction Temperature Range ?40°C to +125°C Storage Temperature Range ?65°C to +150°C Soldering Conditions JEDEC J-STD-020
1
In applications where high power dissipation and poor thermal resistance are present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T A(MAX)) is dependent on the maximum operating junction temperature (T J(MAXOP) = 125°C), the maximum power dissipation of the device (PD (MAX)), and the junction-to-ambient thermal resistance of the part/package in the application (θJA ), using the following equation: T A(MAX) = T J(MAXOP) ? (θJA × P D(MAX)).
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to GND. THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance Package Type θJA Unit
24-Lead LFCSP (CP-24-2) 50 °C/W
ESD CAUTION
ADP5520
Rev. A | Page 6 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
07445-003
1PGND 2SW 3nINT 4SDA 5SCL 6
R215nRST 16VDDIO 17CMP_IN 18GND 14ILED 13R3
7R 18R 09C 011C 212
C 310C 11V B A T 2B S T 3B L _S N K 4G N
D 0C A P _O U T 9
G N D
NOTES
1. EXPOSED PAD MUST BE CONNECTED TO GROUND.
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin N o. Mnemonic Description 1 PGND Power Switch Output to Ground. 2 SW Power Switch Input. 3 nINT Processor Interrupt. This pin is active low, open drain, and should be pulled up to VDDIO. 4 SDA I 2C-Compatible Serial Data Line. Open drain requires external pull-up to VDDIO. 5 SC L I 2C-Compatible Serial Clock Line. Open drain requires external pull-up to VDDIO. 6 R2 Row 2 when configured in a keypad matrix, D2 when configured as an I/O. 7 R1 Row 1 when configured in a keypad matrix, D1 when configured as an I/O. 8 R0 Row 0 when configured in a keypad matrix, D0 when configured as an I/O. 9 C0 Column 0 when configured in a keypad matrix, D4 when configured as an I/O. 10 C1 Column 1 when configured in a keypad matrix, D5 when configured as an I/O. 11 C2 Column 2 when configured in a keypad matrix, D6 when configured as an I/O. 12 C3 Column 3 when configured in a keypad matrix, D7 when configured as an I/O, LED 2 when configured as a current sink. 13 R3 Row 3 when configured in a keypad matrix, D3 when configured as an I/O, LED 3 when configured as a current sink. 14 ILED LED 1 Current Sink.
15 nRST Reset Input, Active Low. This input signal resets the device to the power-up default conditions. Must be driven low
for 75 μs (typical) to be valid.
16 VDDIO Supply Voltage for the I/O Pins. Voltage is 1.7 V to 3.3 V (or VBAT, whichever is smaller). If VDDIO = 0, the device goes
into full shutdown mode.
17 CMP_IN Input for Ambient Light Sensing. 18 GND Ground. 19 GND Ground. 20 CAP_OUT Capacitor for Internal 2.7 V LDO. A 1 μF capacitor must be connected between this pin and GND. Do not use this
pin to supply external loads.
21 VBAT Main Supply Voltage for the IC (2.7 V to 5.5 V). 22 BST Overvoltage Monitor Input for the Boost Converter. 23 BL_SNK Backlight Current Sink. 24 GND Ground.
ADP5520
Rev. A | Page 7 of 40
TYPICAL PERFORMANCE CHARACTERISTICS
VBAT = 3.6 V , T A = 25°C, unless otherwise noted. Inductor = LPS4012-472MLB. Schottky rectifier = MBR140SFT1G.
0246
81012141618202224262830BACKLIGHT CURRENT (mA)
E F F I C I E N C Y (%)
07445-047
Figure 4. Efficiency vs. Backlight Current (6 LEDS) 0
2
4
6
81012141618202224262830
BACKLIGHT CURRENT (mA)
E F F I C I E N C Y (%)
07445-048
Figure 5. Efficiency vs. Backlight Current (4, 5, and 6 LEDS)
2
4
6
81012141618202224262830
BACKLIGHT CURRENT (mA)
E F F I C I E N C Y (%)
07445-04
9
Figure 6. Efficiency vs. Backlight Current (Autoload On/Off)
48
40
32
24
16
2.5
3.0 3.5
4.0 4.5
5.0 5.5
6.0
VBAT (V)
S T A N D B Y S U P P L Y C U R R E N T (μA )
07445-050
Figure 7. Standby Supply Current vs. VBAT
16141210864200
0.5
1.0 1.5
2.0 2.5
3.0
AUX LED PIN VOLTAGE (V)
A U X L E D F U L L -S C A L E S I N K C U R R E N T (m A )
07445-051
Figure 8. Typical Auxiliary LED Pin (R3, C3, or ILED), Full-Scale Sink Current vs.
Applied Pin Voltage
ADP5520
Rev. A | Page 8 of 40
07445-052
Figure 9. Boost Operation (Backlight = 30 mA) 07445-053
Figure 10. Boost Operation (Backlight = 15 mA) 07445-054
Figure 11. Boost Operation (Backlight = 2 mA)
07445-05
5
Figure 12. Boost Startup
ADP5520
Rev. A | Page 9 of 40
THEORY OF OPERATION
07445-004
Figure 13. Internal Block Diagram
The ADP5520 is a backlight white LED driver with an I/O port expander. It is ideal for cell phone designs and other portable devices, where keypad and/or extended I/O functionality is needed. Programmable fade-in, fade-out, dim, and off timers provide the backlight with flexible control features. Using an external photodiode, the ADP5520 can perform ambient light sensing, and adjust the backlight brightness according to varying lighting conditions.
The I/O port expander has eight configurable GPIO pins. The I/Os can be configured as a keypad matrix, digital inputs, or digital outputs. Additionally, two of the I/Os (R3 and C3) can be configured as current sink lines and, paired with a dedicated sink line (ILED), can be used to drive up to three auxiliary LEDs. Programmable fading is also available for auxiliary LEDs. Once programmed through its I 2C-compatible interface, the ADP5520 can run autonomously. An interrupt line (nINT) is available to alert an external microprocessor of the status of its I/Os, keypad presses and releases, ambient light sensor comparator states, and overvoltage conditions.
BACKLIGHT DRIVE AND CONTROL
White LEDs are common in backlighting the displays of modern portable devices such as cell phones. White LEDs require a high forward voltage, V F , before they conduct current and emit light. Display panels, depending on their size, can be backlit with single or multiple white LEDs. In panels that require multiple LEDs, the LEDs are commonly connected in a series string to achieve uniform brightness in each LED by passing a common current through all of them. The LED string needs to be biased with a voltage greater than the sum of the V F of each LED before it conducts.
The ADP5520 is an asynchronous boost converter capable of driving an LED string with 24.5 V (minimum). For detailed information about the boost device, see the Applications Information section. With sufficient forward voltage created, the ADP5520 controls the current (and thus the brightness) of the LED string via an adjustable internal current sink. An internal state machine, in conjunction with programmable timers, dynamically adjusts the current sink between 0 mA and 30 mA to achieve impressive backlight control features.
ADP5520
Rev. A | Page 10 of 40
07445-005
Figure 14. Backlight Brightness Control
BACKLIGHT OPERATING LEVELS
Backlight brightness control can operate in three distinct levels: daylight (L1), office (L2), and dark (L3). The BL_LVL bits in Register 0x02 control the level in which the backlight operates. The BL_LVL bits can be changed manually, or if in automatic mode, by the ambient light sensor (see the Ambient Light Sensing section). By default, the backlight operates at daylight level (BL_LVL = 00), where the maximum brightness is set using Register 0x05 (DAYLIGHT_MAX). A daylight dim setting can also be set using Register 0x06 (DAYLIGHT_DIM). When operat-ing at office level (BL_LVL = 01), the backlight maximum and dim brightness settings are set by Register 0x07 (OFFICE_MAX) and Register 0x08 (OFFICE_DIM). When operating at dark level (BL_LVL = 10), the backlight maximum and dim brightness settings are set by Register 0x09 (DARK_MAX) and Register 0x0A (DARK_DIM).
07445-006
Figure 15. Backlight Operating Levels
BACKLIGHT MAXIMUM AND DIM SETTINGS
The backlight maximum and dim current settings are deter-mined by a 7-bit code programmed by the user into the registers listed in the Backlight Operating Levels section. This 7-bit resolution allows the user to set the backlight to 1 of 128 different levels between 0 mA and 30 mA. The ADP5520 can implement two distinct algorithms to achieve a linear and a nonlinear relationship between input code and backlight current. The BL_LAW bits in Register 0x02 are used to swap between algorithms.
By default, the ADP5520 uses a linear algorithm (BL_LAW = 00), where backlight current increases linearly for a correspond-ing increase of input code. Backlight current (in mA) is determined by the following equation:
Backlight Current = Code × (Fullscale_Current /127) (1) where:
Code is the input code programmed by the user.
Fullscale_Current is the maximum sink current allowed (typically 30 mA).
The ADP5520 can also implement a nonlinear (square approxima-tion) relationship between input code and backlight current level. In this case (BL_LAW = 01), the backlight current (in mA) is determined by the following equation:
Backlight Current = 2
127_???
?
????×
Current
Fullscale Code (2)
Figure 16 shows the backlight current level vs. input code for both the linear and square law algorithms.
07445-007
30
25
20
15
10
5
032
64
96128
SINK CODE
B A
C K L I G H T C U R R E N T (m A )
LINEAR
SQUARE
Figure 16. Backlight Current vs. Sink Code
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