铁路信号联锁系统
中英文资料对照外文翻译文献综述
Component-based Safety Computer of Railway Signal
Interlocking System
1 Introduction
Signal Interlocking System is the critical equipment which can guarantee traffic safety and enhance operational efficiency in railway transportation. For a long time, the core control computer adopts in interlocking system is the special customized high-grade safety computer, for example, the SIMIS of Siemens, the EI32 of Nippon Signal, and so on. Along with the rapid development of electronic technology, the customized safety computer is facing severe challenges, for instance, the high development costs, poor usability, weak expansibility and slow technology update. To overcome the flaws of the high-grade special customized computer, the U.S. Department of Defense has put forward the concept：we should adopt commercial standards to replace military norms and standards for meeting consumers’demand [1]. In the meantime, there are several explorations and practices about adopting open system architecture in avionics. The United Stated and Europe have do much research about utilizing cost-effective fault-tolerant computer to replace the dedicated computer in aerospace and other safety-critical fields. In recent years, it is gradually becoming a new trend that the utilization of standardized components in aerospace, industry, transportation and other safety-critical fields.
2 Railways signal interlocking system
2.1 Functions of signal interlocking system
The basic function of signal interlocking system is to protect train safety by controlling signal equipments, such as switch points, signals and track units in a station, and it handles routes via a certain interlocking regulation.
Since the birth of the railway transportation, signal interlocking system has gone through manual signal, mechanical signal, relay-based interlocking, and the modern computer-based Interlocking System.
2.2 Architecture of signal interlocking system
Generally, the Interlocking System has a hierarchical structure. According to the function of equipments, the system can be divided to the function of equipments; the system can be divided into three layers as shown in figure1.
Man-Machine Interface layer
Interlocking safety layer
Implementation layer
Outdoor
equiptments
Figure 1 Architecture of Signal Interlocking System
3 Component-based safety computer design
3.1 Design strategy
The design concept of component-based safety critical computer is different from that of special customized computer. Our design strategy of SIC is on a base of fault-tolerance and system integration. We separate the SIC into three layers, the standardized component unit layer, safety software layer and the system layer. Different safety functions are allocated for each layer, and the final integration of the three layers ensures the predefined safety integrity level of the whole SIC. The three layers can be described as follows:
(1) Component unit layer includes four independent standardized CPU modules. A hardware “SAFETY AND” logic is implemented in this year.
(2) Safety software layer mainly utilizes fail-safe strategy and fault-tolerant management. The interlocking safety computing of the whole system adopts two outputs from different CPU, it can mostly ensure the diversity of software to hold with design errors of signal version and remove hidden risks.
(3) System layer aims to improve reliability, availability and maintainability by means of redundancy.
3.2 Design of hardware fault-tolerant structure
As shown in figure 2, the SIC of four independent component units (C11, C12, C21, C22). The fault-tolerant architecture adopts dual 2 vote 2 (2v2×2) structure, and a kind of high-performance standardized module has been selected as computing unit which adopts Intel X Scale kernel, 533 MHZ.
The operation of SIC is based on a dual two-layer data buses. The high bus adopts the standard Ethernet and TCP/IP communication protocol, and the low bus is Controller Area Network (CAN). C11、C12 and C21、C22 respectively make up of two safety computing components IC1 and IC2, which are of 2v2 structure. And each component has an external dynamic circuit watchdog that is set for computing supervision and switching.
Diagnosis terminal C12C21C22
&
&
Watchdog driver
Fail-safe switch Input modle Output Modle Interface
Console C11High bus
(Ether NET)
Low bus (CAN)
Figure 2 Hardware structure of SIC
3.3 Standardized component unit
After component module is made certain, according to the safety-critical requirements of
railway signal interlocking system, we have to do a secondary development on the module. The design includes power supply, interfaces and other embedded circuits.
The fault-tolerant processing, synchronized computing, and fault diagnosis of SIC mostly depend on the safety software. Here the safety software design method is differing from that of the special computer too. For dedicated computer, the software is often specially designed based on the bare hardware. As restricted by computing ability and application object, a special scheduling program is commonly designed as safety software for the computer, and not a universal operating system. The fault-tolerant processing and fault diagnosis of the dedicated computer are tightly hardware-coupled. However, the safety software for SIC is exoteric and loosely hardware-coupled, and it is based on a standard Linux OS.
The safety software is vital element of secondary development. It includes Linux OS adjustment, fail-safe process, fault-tolerance management, and safety interlocking logic. The hierarchy relations between them are shown in Figure 4.
Safety Interlock Logic
Fail-safe process
Fault-tolerance management
Linux OS adjustment
Figure 4 Safety software hierarchy of SIC
3.4 Fault-tolerant model and safety computation
3.4.1 Fault-tolerant model
The Fault-tolerant computation of SIC is of a multilevel model:
SIC=F1002D(F2002(S c11,S c12),F2002(S c21,S c22))
Firstly, basic computing unit Ci1 adopts one algorithm to complete the S Ci1, and Ci2 finishes the S Ci2via a different algorithm, secondly 2 out of 2 (2oo2) safety computing component of SIC executes 2oo2 calculation and gets F SICi from the calculation results of S Ci1 S Ci2, and thirdly, according the states of watchdog and switch unit block, the result of SIC is gotten via a 1 out of 2 with diagnostics (1oo2D) calculation, which is based on F SIC1 and F SIC2.
The flow of calculations is as follows:
(1) S ci1=F ci1 (D net1,D net2,D di,D fss)
(2) S ci2=F ci2 (D net1,D net2,D di,D fss)
(3) F SICi=F2oo2 (S ci1, S ci2 ),(i=1,2)
(4) SIC_OutPut=F1oo2D (F SIC1, F SIC2)
3.4.2 Safety computation
As interlocking system consists of a fixed set of task, the computational model of SIC is
task-based. In general, applications may conform to a time-triggered, event-triggered or mixed computational model. Here the time-triggered mode is selected, tasks are executed cyclically. The consistency of computing states between the two units is the foundation of SIC for ensuring safety and credibility. As SIC works under a loosely coupled mode, it is different from that of dedicated hardware-coupled computer. So a specialized synchronization algorithm is necessary for SIC.
SIC can be considered as a multiprocessor distributed system, and its computational model is essentially based on data comparing via high bus communication. First, an analytical approach is used to confirm the worst-case response time of each task. To guarantee the deadline of tasks that communicate across the network, the access time and delay of communication medium is set to a fixed possible value. Moreover, the computational model must meets the real time requirements of railway interlocking system, within the system computing cycle, we set many check points P i (i=1,2,... n) , which are small enough for synchronization, and computation result voting is executed at each point. The safety computation flow of SIC is shown in Figure 5.
S t a r t
S t a r t
０
τ１τ２τ１Ｐ２Ｐ０τ１τ２τ１Ｐ２Ｐ０Ｔ０ＴＣ1i Ｃi 2
1Ｔ2Ｔ1Ｔ2Ｔ……………
……
n+1τn+1τn Ｐn Ｐn τn τclock
clock
S a f e t y f u n c t i o n s T a s k s o f i n t e r l o c k i n g l o g i c i :p
:c h e c k p o i n t I n i t i a l i z e S y n c h r o n i z a t i o n G u a r a n t e e S y n c h r o n o u s T i m e t r i g g e r
Figure 5 Safety computational model of SIC
4. Hardware safety integrity level evaluation
4.1 Safety Integrity
As an authoritative international standard for safety-related system, IEC 61508 presents a definition of safety integrity: probability of a safety-related system satisfactorily performing the required safety functions under all the stated conditions within a stated period of time. In IEC 61508, there are four levels of safety integrity are prescribe, SIL1～SIL4. The SIL1 is the lowest, and SIL4 highest.
According to IEC 61508, the SIC belongs to safety-related systems in high demand or
continuous mode of operation. The SIL of SIC can be evaluated via the probability of dangerous per hour. The provision of SIL about such system in IEC 61508, see table 1.
Table 1-Safety Integrity levels: target failure measures for a safety function operating in high demand or continuous mode of operation
Safety Integrity level
High demand or continuous mode of Operation (Probability of a dangerous Failure per hour)
4 ≥10-9 to ＜10-8
3 ≥10-8 to ＜10-7
2 ≥10-7 to ＜10-6
1 ≥10-6 to ＜10-5
4.2 Reliability block diagram of SIC
After analyzing the structure and working principle of the SIC, we get the bock diagram of reliability, as figure 6.
2002200220022002NET1
NET2
NET1
NET2
λ=1×10-7
DC=99%
Voting=1002D λ=1×10-7DC=99%Voting=1002D λ=1×10Β=2%βD =1%
DC=99%
Voting=1002D High bus
Logic subsystem Low bus
Figure 6 Block diagram of SIC reliability
5. Conclusions
In this paper, we proposed an available standardized component-based computer SIC. Railway signal interlocking is a fail-safe system with a required probability of less than 10-9 safety critical failures per hour. In order to meet the critical constraints, fault-tolerant
architecture and safety tactics are used in SIC. Although the computational model and implementation techniques are rather complex, the philosophy of SIC provides a cheerful prospect to safety critical applications, it renders in a simpler style of hardware, furthermore, it can shorten development cycle and reduce cost. SIC has been put into practical application, and high performance of reliability and safety has been proven. ………………………………………………………………………………………………………
模块化安全铁路信号计算机联锁系统
1概述
信号联锁系统是保证交通安全、提高铁路运输效率的关键设备。长期以来，在联锁系统中采用的核心控制计算机是特定的高档安全计算机，例如，西门子的SIMIS、日本信号的EI32等。随着电子技术的飞速发展，定制的安全计算机面临着严重的挑战，例如：高的开发成本、可用性差、弱可扩展性、和缓慢的技术更新。为了克服高档特定计算机的缺点，美国国防部提出：我们应该采用商业标准，来取代军事准则和满足客户需要的标准。与此同时，有许多关于在电子设备中采用开放式系统结构的探索与实践。美国和欧洲已经做了很多关于利用利用划算的容错计算机来代替专用电脑在航天和其它安全关键领域。近年来，在航空航天、工业、交通和其它安全关键领域，利用标准化部件正逐步成为一种新的趋势。
2 铁路信号联锁系统
2.1信号联锁系统的功能
信号联锁系统的基本功能是通过控制信号设备，保护列车运行安全。如控制道岔的转换、信号的开放和控制列车通过车站，它通过一种联锁处理规则控制线路。
自铁路运输诞生以来、信号联锁系统已经经历了手动信号、机械信号、继电器联锁和现代计算机联锁系统。
2.2信号联锁系统的构架
一般来说，联锁系统具有层次结构。根据设备的功能，系统可分为三层，如图2.1所示。
人机接口层
联锁安全层
执行层
室外设备
图2.1 信号联锁系统的结构
3 安全计算机的组件设计
3.1设计策略
模块化安全关键计算机组件的设计理念不同于那些特殊定制的计算机。我们对安全联锁计算机的设计理念是基于系统的容错性和系统的综合需求。将其分为三层：标准化组成单元层、软件安全层与系统层，并给每一层分配不同的安全功能，最终将三层集成，并确保系统达到预定的安全完整性水平。三层可以描述如下：
(1) 标准化组成单元层包括四个独立的标准化CPU模块。这一层实现硬件“安全”逻辑联锁。
(2) 软件安全层主要用故障-安用策略和容错算法。由于一个完整的安全联锁系统采用两个不同的CPU输出的结果，所以最能确保软件设计某一版本，在设计时存在的多种错误，清除潜在的风险。
(3) 系统层，旨在提高系统的可用性和冗余系统的可维护性。
3.2容错结构的硬件设计
如图3.1，安全联锁计算机由四个独立单元组成(C11，C12，C21，C22)。采用双容错结构设计(2×2取2)结构，计算单元选用高可靠性、高效率的模块，采用了英特尔XScale 内核，533兆赫的处理器。
安全联锁计算机的操作基于两层数据总线上。高速总线采用标准以太网结构和TCP / IP 通信协议、低总线控制器局域网(CAN)。C11、C12和C21、C22分别组成两个独立的安全计算部件IC1和IC2，并构成2乘2取2结构，并且每一部分都有计算机监控和外部开关电路动态监测。
监测终端
C12C21C22
&
&
与门驱动程序
故障安全开关输入模块输出模块接口
控制台C11高总线
（以太网）
底总线（CAN ）
图3.1 SIC 硬件结构
3.3标准化组成单元
在研究清楚组成模块后，根据铁路信号联锁系统的临界安全性要求，我们必须做一个二次开发的模块。该设计主要包括电源、接口和其他嵌入式电路。
安全联锁计算机的容错计算、处理、故障的同步诊断主要依靠安全软件。这个安全软件的设计方法不同于其他专用的特殊计算机。在专用特殊计算机中，软件通常基于单一裸露硬件而特别设计，限于计算处理能力和软件兼容性，在电脑上特殊的调度程序一
般基于安全性软件设计，而不是一个普通的操作系统。专用计算机中容错处理系统和故障诊断系统通过硬件耦合。然而，安全联锁计算机中的安全软件是开放、宽松的，它基于标准的Linux操作系统。
安全软件的二次开发是至关重要的。它包括Linux系统调整，故障-安全导向、容错性管理，安全联锁的逻辑。它们之间的层次关系如图3.3。
安全联锁逻辑
故障-安全进程
容错原理
Linux 操作系统调整
图3.3 SIC的安全软件层次关系
3.4容错模型和安全估计算
3.4.1 容错模型
安全联锁计算机的多层容错计算模型：
SIC= F1oo2D (F2oo2(S C11, S C12 ), F2oo2 (S C21,S C22)
首先,根据计算单元Ci1采用一个算法来完成Sci1，Ci2计算单元通过不同的算法完成Sci2，其次，安全联锁计算机实行二乘二取二算法计算得到的结果和Sci1、Sci2计算，输出到F SICi中的结果，再进行二乘二取二运算，第三，根据监视系统和开关单元块，安全联锁计算机运算的结果在基于F SIC1和F SIC2输出的结果上，经过与门的诊断处理（2取1），就计算出Sci1。同样的，根据Ci2的计算结果通过不同的算法也完成Sci2。
计算流程如下：
(1)Sci1=F ci1 (D net1，Dnet2，Ddi，Dfss)；
(2)Sci2=F ci2 (D net1，Dnet2，Ddi，Dfss)；
(3)FSIC1=F2oo2 (S ci1，Sci2)，(i=1，2)；
(4) SIC OutPut=Floo2D(FSIC1，FSIC2)。
3.4.2 安全性计算