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AR0135 Fasten Your Seatbelts and check out whats new in Altium Designer 6.0

AR0135 Fasten Your Seatbelts and check out whats new in Altium Designer 6.0
AR0135 Fasten Your Seatbelts and check out whats new in Altium Designer 6.0

Fasten Your Seatbelts and Check Out What's

New in Altium Designer 6.0

Summary

AR0135 (v1.2) March 11, 2008

Altium Designer 6.0 brings a host of new and enhanced features to improve PCB and

FPGA design productivity. This release includes a mix of major new features and

technologies, combined with numerous smaller enhancements. Many of the

enhancements are based on feedback from you, the engineers and designers

developing electronic products in Altium Designer.

Altium Designer 6.0 brings a number of substantial improvements to the PCB and FPGA design process. Almost all areas of the software have been strengthened and enhanced.

Physical platform design has been upgraded to support the high board densities and high-speed signaling found in today’s designs. Differential pair, smart interactive and BGA escape routing, backed up by pin/part swapping with dynamic net assignment brings a new level of power to the routing process.

Programmable design support has been extended, with increased programmable device and processor coverage, and higher levels of physical-level integration. Support for all boundary-scan devices on your board, combined with the enhanced real-time JTAG Device Viewer gives you pin state monitoring, right down on the running board. The new configurable 8 to 64-bit LAX, with its built in multiplexer and code disassembly capabilities greatly enhances the FPGA design process.

With this release it is also significantly easier to integrate Altium Designer with company engineering and business management systems commonly found in medium and large-scale organizations. Place components directly from your company database using the new database-driven Part Libraries, and include database information directly in the Bill of Materials.

These are just a few of the new features in what we believe is the most exciting release of Altium Designer yet. Read on to learn more about the new and improved electronic product development technology in Altium Designer 6.0.

Seeing is Believing – Read More and Watch Videos of the New Features

A commonly stated saying is that seeing is believing. Learning by watching and listening is something we do naturally, and is an ideal way to learn about computer software. If you’d like to read more about Altium Designer 6.0, as well as watch short videos about some of the exciting new features, then visit the What’s New in Altium Designer 6 page on the website and enjoy the action. Click the link below to read more and watch the videos.

https://www.doczj.com/doc/bc13779313.html,/WhatsNewin6/

Stuff that will Blow You Away!

Board Insight?

Figure 2. The Board Insight Heads-up display.

Figure 3. The Board Insight Hover mode showing keyboard shortcuts for

more information.

A complex-multi layer board makes for a visually dense and often difficult to interpret workspace. The new Board Insight system makes it easier to view and understand the objects in your design. The Board Insight system is an integrated set of features developed to meet your view management needs. For this release Board Insight includes an Insight Lens, heads-up cursor information, floating graphical views, simplified net

highlighting, and enhanced net labeling on objects.

Insight Lens

The new Insight Lens makes light work of

performing a detailed examination of your board. While the workspace remains at a low level of zoom you can closely inspect the smallest detail on the board, magnifying it in the Insight Lens. With its own zoom and single layer shortcuts, working with the Insight Lens will soon become second nature. Turn the Lens on and off in the View menu, and configure it in the PCB – Board Insight Lens page of the Preferences dialog.

Heads-Up Display Data

The Heads-Up display gives you real-time

feedback about objects currently under the cursor in the PCB workspace. The Heads-Up display is configurable, and can include cursor location, delta information (from the last mouse click), current layer and current-snap grid. As well as the information content, the display font and colors can also be configured.

Figure 1. You can use the Insight Lens to closely examine your board.

The heads-up display can be parked anywhere on the screen using the SHIFT + G shortcut, and picked up again using the same shortcut. This allows you to have it move with the cursor, or position it anywhere on the screen in a fixed location.

Heads-Up Hover Mode

If you pause for a moment as you are moving the cursor, the Heads-Up display will switch to Hover mode. In Hover mode extra information is displayed, this can include a summary, available shortcuts, rule violations, net, component and primitive details.

Configure the Heads-Up display feature in the PCB – Board Insight Modes page of the Preferences dialog.

Popup Mode

The new Board Insight system’s Popup view is an excellent tool for interrogating objects under the cursor. A click on the mouse wheel presents the Popup view, which includes list of all components, nets and violations under the cursor, and a graphical display of the object currently chosen in the list. From the list you can Edit, Select or Zoom on any of the objects.

The Board Insight list can include primitive objects, such as pads and tracks that belong to the

components, nets and violations. The list is hierarchical, allowing you, for example, to drill down for complete detail on the objects causing a violation.

Use the SHIFT + V shortcut the

load the Popup with information

about any violations under the cursor. SHIFT + X loads the Pop-up with information about any nets and components under the cursor. Click the Mouse wheel to open the Pop-up with components, nets and violations currently under

the cursor.

Figure 4. Click the mouse wheel to display the Board Insight’s Popup view. Figure 5. The Board Insight panel gives detailed view of what is currently under the cursor.

Panel Mode

The Board Insight Panel provides the same information as the popup view, in a panel, with no keystrokes required to update the contents. When you hover over component, net or violation objects they will be loaded into the panel, where you can edit them, change their selection state and navigate to them. The lower region of the panel includes the Board Insight Lens, giving you a close up view of the area currently under the cursor.

The Board Insight panel works like any other panel – it can be resized, docked or floated over the workspace. The information in the panel is updated after briefly pausing the cursor. Once the information is in the panel it will remain until the cursor is paused in a new location.

You can edit the objects, change their selection state and navigate to them from this mode.

Enhanced Visual PickList

A multi-layer PC

B design makes for a dense and visually crowded workspace, with many objects on top of one another. The enhanced Visual PickList makes object selection simple. When the cursor is clicked (or double-clicked) and there are multiple objects under the cursor the Visual PickList will appear, as you move the mouse through the list the current object will select on the board, as well as being displayed in the floating view port, allowing for easy identification. The objects in the PickList are

also sorted by layer.

Figure 6. The Visual PickList makes it easy to choose the correct object in a crowded workspace.

Dynamic Net Highlighting

Figure 7. Hold CTRL + ALT on any net to hide everything but what you clicked

Net highlighting is one of those essential PCB editing

features that you use constantly. CTRL + Click on a net and everything in the workspace that is not part of the net you clicked on is faded, making the routing stand out, across all signal layers.

Making sense of complex PCB designs has been made even easier with the new dynamic net highlighting feature. Simply hold CTRL + ALT as you move the mouse, as soon as it is over a net, that net will be highlighted.

Displaying Net Names on Tracks

Figure 8. Net names on the tracks is another time saving feature.

Have you ever wanted to be able to easily ‘read’ your design? Sure you can tell which component is which, but until now the routing gives you no feedback, appearing as a dense collection of unlabelled tracks. As part of the new Board Insight system each track now displays its net name, another handy Insight into your PCB design.

Enhanced Single-layer Display with Gray-scale

A popular feature with Altium Designer’s PC

B editor is the single layer display mode. A press on the SHIFT + S shortcut hides all display layers except the current layer, instantly de-cluttering your view to only show the objects on the layer you are working on.

Single layer mode has been enhanced by the addition of two new options, allowing you to retain other layer data in your view, except displaying it without color. Converting all other layer colors to gray-scale or monochrome lets you retain the spatial relationship information about the location of other objects in the design, without distracting you from the layer of interest. Control these new options using the Background intensity slider under the Mask Level button in the PCB workspace.

Single layer mode behavior is configured in the PCB – Board Insight Display page of the

Preferences dialog By default, all 3 single layer display modes are enabled, meaning that you will cycle through them as you press Shift+S . Use the check boxes in the Preferences dialog to turn off any options you do not want included when you press Shift+S .

Single layer mode also supports blind and buried vias, ensuring that the display accurately

represents the via copper on the active layer.

User-configurable Pad and Via Details

Altium Designer now gives much greater control over the display of net and number detail on pads

and vias. Configure the font, the color and the transparency color to work with your

workspace colors in the PCB – Board Insight Display page of the Preferences

dialog.

Figure 9. Single layer display, in the dimmed gray scale mode. Strings are automatically presented as right-reading, aligned in the direction that maximizes the area available to display them.

Flip and Edit the Board

You can now work on the bottom of the board as easily as you work on the top. Use the new View ? Flip Board command to turn over the entire workspace, just as if you were turning over the board in your hand. All standard actions and editing commands are supported, including routing, positioning components, and positioning text. Simply select the command again to flip the board back.

Figure 10. View the bottom from below by selecting View ? Flip Board.

The coordinate space remains logically the same, so the workspace origin moves from the bottom left to the bottom right, and the current grid position increases in the X direction as you move the mouse from right to left, instead of the normal left to right. Any output generated while the view is flipped will maintain the correct viewed-from-top coordinate information.

The layer drawing order is also changed, using a logical-pair swapping process. This means that TopOverlay will swap positions in the current layer drawing order with BottomOverlay, TopLayer with BottomLayer, Mid Layer1 with Mid Layer30, Internal

Plane1 with Internal Plane16, and so on. The drawing order of mechanical layers is not changed.

The view state is automatically restored to standard top-side viewing if the file is closed and reopened.

Smart Paste

As an engineer you know there are a large number of objects to be placed and connected as you build up your design. A common technique to accelerate this process is to copy similar objects that you have already used, paste them to where you

are currently working, and modify them as required.

The schematic editor’s new Smart Paste feature takes this approach to an entirely new level – using Smart Paste you can actually transform the copy of the selected objects into other objects as you paste them. For example the selected Net Labels can become Ports when pasted, or the selected Sheet Entries can become Ports+Wires+Net Labels, all in a single paste action.

Figure 11. Sheet Entries being transformed into Wires+Ports+Net Labels as they are Smart Pasted.

You also have complete control over which of the objects in the selection set you want to paste – no more carefully avoiding those wires as you select the Ports, simply clear the checkbox to ignore wires when you Smart Paste your selection.

Another handy feature is the ability to paste the selected circuitry as a graphic. Using this you can easily include a graphic of section of circuit on another sheet, and size it as required. Select Edit ? Smart Paste to transform the clipboard objects as you paste them.

Parametric Hierarchical Design

Hierarchical design is one of the outstanding strengths of Altium Designer, allowing you to structure your design in a logical and meaningful fashion. Altium Designer’s hierarchical design capabilities are not just for structuring the design though, they are also the backbone of the multi-channel design capabilities, and also makes it very easy to reuse a section of circuitry in different electronic product designs.

The challenge with reusing a section of design, for example pointing from a sheet symbol on your current project to your company’s preferred power supply schematic, is that the values of the components are not always fixed from one design to the next. The new support for parametric hierarchical design solves this – it allows you to move the specification of the component values from the schematic sheet, into the sheet symbol that references that sheet. This capability also works in perfectly with multi-channel design (designs where the same section of circuitry is repeated), allowing you to have different component values in each channel.

Parametric components are defined by declaring their value as a parameter of the sheet symbol above, and then referencing that parameter on the target component.

Figure 12. A graphic equalizer with different capacitor values in each channel.

For example, a graphic equalizer can have the same circuit repeated many times, with the only difference between each channel being the component values. So a capacitor might take the values 0.12μF, 0.056μF, and 0.033μF in the different channels. Implementing this in Altium Designer is now simple since you can specify these values in the sheet symbol referencing each channel, eliminating the need to have many similar schematics with only component values being different. Parametric hierarchy is not limited to component values; you can parametrically reference any component parameter or any text label on the schematic sheet. Another powerful feature of the system is that you can refer to parameters from a symbol that is many sheets up in the hierarchy; the system will search the hierarchy until it finds the matching parameter.

Smart Interactive Routing

Smart Interactive Routing is the name of Altium Designer’s new intelligent interactive routing mode. Smart Interactive Routing works with you in an intuitive way, attempting to completely route the chosen connection along the shortest path, using horizontal, vertical and diagonal segments, while automatically walking around any obstacle along the path. Smart Interactive Routing will automatically complete the entire connection if both the start and end nodes are on the same layer, while maintaining any applicable design rules.

Select Place ? Smart Interactive Routing from the menus to start smart routing, or select the command from the right-click menu.

Figure 13. A set of connections being Smart Interactive routed, hold Ctrl and click to completely route the current connection.

Since Smart Routing is an interactive routing tool you control the behavior using the cursor and the built-in shortcuts. It has 2 basic modes of operation, an auto complete mode where it will attempt to find a path for the entire connection, and auto-complete off, where it will attempt to route up to the current cursor location.

With auto complete on the segments up to the cursor are shown as solid and will place when you click, while the segments beyond the cursor are proposed, and are shown as dashed outlines. If you like the proposed path then simply hold CTRL as you click, and the entire connection is routed!

If you prefer to use it in a route-to-cursor type mode, simply press 5 to toggle auto complete off and the Smart Interactive Router will seek out a path from the connection start point up to the cursor, walking around obstacles along the way.

As well as walking around obstacles to avoid conflicting with them, you can instruct it to stop at the first conflict, or ignore conflicts – press SHIFT + R to cycle through the modes. To select another connection leaving the pad you are routing from press the 7 shortcut. Press the SPACEBAR to change the corner mode.

Press ~ (tilde) key while Smart Interactive Routing to display the available shortcuts.

Figure 14. Press the ~ (tilde) key while Smart Routing to display the shortcuts.

Scan any JTAG Device in Real Time

Boundary scan, or JTAG, as it is more commonly known, was developed as a system for testing digital integrated circuits mounted on the assembled printed circuit board, and for testing the interconnects provided by that board. Altium Designer 6.0 brings this level of JTAG testing to your development environment – right on your own project board.

Altium Designer has a complete JTAG communications system, and with the release of Altium Designer 6.0 this has been extended to support all JTAG compliant devices. By including the standard BSDL file supplied with each JTAG compliant device you have access to the pins on every JTAG device in your design, through the enhanced real-time JTAG viewer.

Enhanced Generic JTAG Device Support

Altium Designer’s JTAG communications system has been enhanced to support all JTAG compliant devices. By including the standard BSDL file supplied with each JTAG device you have access to the pins on every JTAG device in your design.

Figure 15. Specify the BSDL file and the libraries to use for any JTAG based component.

The system even supports the situation where a BSDL file is not available for a device – simply set the instruction length for this device to zero and the JTAG system will continue to communicate to other devices in the chain.

Enhanced Real-Time JTAG Device Viewer

High density surface mount component packaging systems, such as Ball Grid Arrays (BGAs), mean that physically probing device pins is no longer possible – presenting you with a real challenge when it comes to debugging your design. Enter Altium Designer’s enhanced Real-Time JTAG Device Viewer – suddenly physical design debugging has moved to a new level.

Figure 16. Examine the state of pins for any JTAG compliant device in your design.

The JTAG Device Viewer uses the JTAG communications standard to interrogate the state of the pins in any JTAG compliant device in your design, not just the FPGAs. It presents the state of each pin, and includes a image of both the schematic symbol and the footprint, helping you to analyze and debug your design.

View the Action on the PCB

Design debugging support also extends back to the design documents. Previously Altium Designer supported displaying the pin states back on the schematic, with the release of Altium Designer 6.0 you can also display the pin states on the PCB design – ideal for analyzing your design’s performance.

Figure 17. Monitoring the state of device pins on the PCB.

Build Bigger, Better Boards

Designing with Differential Pairs

Differential signaling is fast becoming the preferred signaling interface method, driven by the ever increasing signal speeds in electronic products. By their very nature FPGAs are ideally suited to high-speed designs, and in support of this FPGA vendors are including differential signaling capabilities (LVDS), from their lower-cost devices right through to their high-end 1500+ pin mega-gate devices.

Altium Designer 6.0 has excellent support for differential signaling – from defining pairs on the schematic, through to interactive differential pair routing on the PCB. PCB routing is backed up by full support for pair swapping using Altium Designer’s new dynamic net assignment capabilities, an exciting concept that can swap not only unrouted net pairs, but also partially routed net pairs, allowing you to harness the full benefits of the FPGA’s reconfigurable design capabilities throughout the routing process. Background

A differential signaling system is one where a signal is transmitted down a pair of tightly coupled carriers, one of these carrying the signal, the other carrying an equal but opposite image of the signal. Differential signaling was developed to cater for situations where the logic reference ground of the signal source could not be well connected to the logic reference ground of the load. Differential signaling is inherently immune to common mode electrical noise, the most common interference artifact present in an electronic product. Another major advantage of differential signaling is that it minimizes electromagnetic interference (EMI) generated from the signal pair.

Differential pair routing is a design technique employed to create a balanced transmission system able to carry differential (equal and opposite) signals across a printed circuit board. Typically this differential routing will interface to an external differential transmission system, such as a connector and cable.

It is important to note that while the coupling ratio achieved in a twisted pair differential cable may be better than 99%, the coupling achieved in differential pair routing will typically be less than 50%. Current expert opinion is that the PCB routing task is not to try to ensure a specific differential impedance is achieved, rather the objective is to maintain the properties required to ensure the differential signal arrives in good condition at the target component as it travels from the external cabling. According to Lee Ritchey, a noted industry high-speed PCB design expert, successful differential signaling does not require working to a specific differential impedance. What it does require is:

To set each of the routing signal impedances to half the incoming differential cable impedance.

That each of the two signal lines is properly terminated in its own characteristic impedance at the receiver end.

That the two lines should be of equal length, to within tolerances of the logic family. Typically a length difference of up to 500mils is acceptable.

Use the benefit of routing the two signals side-by-side to help achieve good quality routing of matched lengths, where required it is acceptable to separate to route around obstacles.

Layer changes are acceptable, as long as the signal impedances are maintained.

For more information, refer to the article Differential Signaling Doesn't Require Differential Impedance, by Lee W. Ritchey, available from https://www.doczj.com/doc/bc13779313.html,/RelatedArticles.htm.

Defining the Differential Pairs on the Schematic

Pairs can be defined on the schematic by placing a Differential Pair directive (Place ? Directive). The net pair must be named with the suffixes of _N and _P. Differential pair definitions are then transferred to the PCB during design synchronization.

Figure 18. Place Directives on the schematic to define differential pairs.

For those special circumstances where pairs cannot be defined on the schematic, differential Pair objects can also be defined in the PCB editor. To create a Differential Pair object in the PCB editor and assign two nets to it you can either select the two nets in the graphical space using the Place ? Differential Pair command, or click the Create From Nets button in the PCB editor panel, set to the new Differential Pair Editor mode.

Viewing and Managing the Pairs

Differential pair definitions are viewed and managed in the PCB editor panel, set to Differential Pairs Editor . Figure 19 shows the pairs that belong to the All Differential Pairs class. Pair D_V_TX1 is highlighted, the nets in this pair are V_TX1N and V_TX1P. The (-) and (+) displayed next to each member net name is a system flag, indicating if it is the positive or negative member of the pair.

Applicable Design Rules

There are three design rules you will need to configure to route a differential pair. These are:

Routing Width – defines the routing width required for both nets in

the pair. Set the scope of this rule to target objects that are members of a differential pair, eg. InDifferentialPair . Differential Pairs Routing – defines the separation between the

nets in the pair, the gap allowed, and the overall uncoupled length (the pair is uncoupled when the gap is wider than the Max Gap setting). Set the scope of this rule to target objects that are a differential pair, eg. IsDifferentialPair . Match Net Length – define how much the overall routing lengths

can differ for the two nets in the pair. Note that the rule is also used to configure the routing shape to be used if you run the Equalize Net Length command. Set the scope of this rule to target objects that are a differential pair, eg. IsDifferentialPair . Setting the Scope of the Design Rules

The scope of the design rule defines the set of objects that you want the rule to applied to. Since a differential pair is an object, you can use

queries like the following examples to scope the rule to target differential

pairs:

InDifferentialPairClass('All Differential Pairs') – targets all nets in

all pairs belonging to the differential pair class called All Differential Pairs. Figure 19. Differential pairs can be viewed and managed in the Differential Pair Editor.

InDifferentialPair('D_V_TX1') – targets both nets in the differential pair named D_V_TX1.

InAnyDifferentialPair – targets any object that is in a differential pair.

(IsDifferentialPair And (Name Like 'D*')) – targets all differential pair objects whose name starts with the letter D.

Clicking the Rule Wizard button in the Differential Pairs Editor (PCB panel) will walk you through the process of setting the required design rules. Note that the scope used for the created rules will depend on what was selected when the Rule Wizard button was clicked – if one pair was selected the rules will target that pair and its nets, but if a differential pair class was selected then the rules will target all the nets and pairs in that

class.

Figure 20. The differential pair rule wizard

Routing a Differential Pair

Differential pairs are routed as a pair – that is you route two nets simultaneously. To route a differential pair select Place ? Differential Pair Routing from the menus. You will be prompted to select one of the nets in the pair, click on either to start

routing. Figure 21 shows a differential pair being routed. To make the connection lines for the pair easier to see, click on the pair

in the Differential Pair Editor. This will mask all other nets in the design.

Figure 21. Both nets in the differential pair are routed simultaneously, press ~ (tilde) to see the shortcuts.

Differential pairs are routed using Altium Designer’s new Smart Interactive Routing mode, which is described earlier in this document. Standard routing shortcuts remain, such as pressing the * key on the numeric keypad to switch to the next routing layer. For a list of all shortcuts available during differential pair routing, press the ~ (tilde) key.

Full Differential Pair Support for FPGA Designs, Including Pin-pair Swapping

Modern FPGAs, even those with very low cost, have a large number of I/O pins that can be configured as differential pairs. To make it easy to harness the power of these Altium Designer 6.0 includes full support for integration of FPGA-based differential pairs, in both the FPGA design and the PCB design.

In your FPGA design you can assign a single net to a differential I/O standard, such as LVDS, and this will be mapped to a pair of physical nets at the PCB design level. This process is under your control using the FPGA Signal Manager.

The design compiler can also determine if the pins used as differential pairs at the PCB design level map correctly to the allowable pairs on an FPGA device.

Figure 22. Differential support flows from FPGA design through to PCB design.

Signal Integrity Support for Differential Pairs

Altium Designer's Signal Integrity analyzer provides full support for the simulation of differential pairs. This uses the correct signal integrity model for pins when using the LVDS standard with FPGAs.

Pin / Part Swapping with Dynamic Net Assignment

Working in harmony with the new differential pair routing and BGA escape routing capabilities is the new pin swapping

capabilities. This feature provides all the benefits of traditional pin-swapping systems, but takes advantage of Altium Designer's intimate understanding of the net assignments in the design to lift pin swapping to a new level. During a pin swap operation Altium designer analyses the net assigned to the chosen pin, and dynamically reassigns the net on any connected routing. This level of functionality means that partially routed nets and pre-routed multilayer escapes from complex BGA devices can now be swapped.

Differential pairs can now also be swapped, taking advantage of the knowledge about differential pin-pairs on FPGAs.

At the PCB level the system includes a powerful automatic optimizer that uses this information to dynamically re-assign nets to improve routability. For example, the system can perform a reconnect

on multiple devices that have been escape routed

on multiple layers. It will assign these based on matching escape route layers, shortest Manhattan routing distance, and minimum number of crossovers on each layer.

Figure 23. The 2-stage automatic pin/net optimizer minimizes connection length

and crossovers. The addition of partial routed net swapping, along with the automatic optimizer gives you the ability to adopt a hierarchical and iterative routing strategy, escape routing devices first, then routing to the edge of a given area, and then finally connecting these sections together. At any time, the automatic swapper can be re-run to re-optimize, based on the updated information provided by the partially routed nets.

Configuring Pin and Part Swapping

Pin and part swap-ability settings are stored in the schematic component, while the option to allow pin or part swapping on a specific component is enabled in the PCB editor, and stored in the PCB component.

Pin swap settings can be configured in the schematic and schematic library editors, or the PCB editor, look for a Configure Pin Swapping command in the Tools menu of each editor. Selecting this will open the Swap Manager , Figure 24 shows the PCB editor Swap Manager. The Swap Manager lists all components used in the design (or library), with their current swap settings.

The PCB editor Swap Manager includes additional columns for enabling/disabling swapping on each component on the board. The Swap Manager includes a powerful right-click menu, making it very easy to quickly copy the settings from one component to another, or enable/disable multiple components in a single click.

Figure 24. Use the Swap Manager to configure and manage pin swapping for all components in the design.

Double-clicking on a component will open the Configure Pin Swapping dialog, as shown in Figure 25 and Figure 26. Here you

can set up both the pin and part swapping specifications for that device.

Figure 25. Configure the pin and part swapping for an individual component, in this case an FPGA.

The basic rule of swap-ability is that if they share the same swap value, then they can be swapped. Consider the simple

examples shown below, the pin swapping configuration for a quad OR gate, and a quad op-amp.

Figure 26. Use alpha and numerical swap values to define swap-ability.

From the previous figure the following can be observed:

Within each of the 4 gates in the quad OR gate, the 2 input pins can be swapped with each other, but the output pin has no pin with a matching swap value within that part. On the other hand, the quad op-amp has no swappable pins.

The Part Group column defines the swap-ability of the part that that pin belongs to. Note that it does not define which part the pin belongs to, that is defined by the way the component was created in the schematic library. All 4 parts in both quad devices are swappable with any other part in that device.

Pins with no Pin Group swap value are not swappable, as shown for the quad op-amp.

Pins with no Part Group swap value means that the part they belong to is not swappable.

The Part-Sequence defines the pin correspondence between parts. This information is required so that the part swapper knows how to re-allocate the nets to each pin in the part when a swap is performed. Note that for the quad OR gate either input pin can map to either input pin when a part swap occurs. Note that for the quad op-amp the net on a negative input pin must go to another negative input pin when a part swap occurs.

Swapping Pins and Parts

Pin/part swapping is enabled/disabled for a component once it is placed on the PCB. You can enable it selectively for any component in the PCB Inspector panel (click once on the component to select it, then press F11 to display the Inspector). Alternatively, you can enable pin and/or part swapping for any component on the board in the Swap Manager, as shown in Figure 24. Use the right-click menu in this dialog to quickly set the swap options for multiple components.

Once pin/part swapping has been enabled, use the commands in the PCB editor’s Tools ? Pin/Part Swapping sub-menu to perform a pin or part swap.

The process is essentially the same for both pin and part swapping, after selecting the command everything in the PCB workspace is masked (faded), except those pins that are swappable. The Status line will prompt you for the next action, to choose a sub-net (for a pin swap) or sub-part (for a part swap). After clicking on a pin, you will be prompted to select the target net or sub-part to swap with. Figure 27 shows this for a quad resistor array, for a pin-swap the target net is the resistor’s other pin, for a part-swap the target sub-part is one of the other 3 resistors in the array.

Figure 27. Swappable pins are highlighted (first image). After clicking the first pin during a pin swap, possible target pins are highlighted (centre image. ) After clicking a pin in the part during a part swap, the target parts are highlighted (last image).

BGA Escape Routing

Altium Designer has excellent surface mount component fanout tools. These have been enhanced by the addition of support for BGA Escape routing. The escape routing engine will attempt to route each pad out to just beyond the edge of the device – making the remaining routing

challenge much easier.

Figure 28 shows the escape routing from a 1mm pad pitch BGA. Used inner pads are first fanned out using the traditional dog-bone (a short route with a via on the end) to access another layer, and then from the via they are escape routed out just beyond the edge of the device, working

through the available routing layers until all pads have been escape routed.

Right-click on a BGA and select Component Actions ? Fanout Component from the context menu. The routing will be done in accordance with the applicable design rules. A report of all pads that could not be escape routed will be generated and opened, click on an entry in the report to cross probe to the PCB and examine that object.

TrueType Font Support

Figure 28. Note how the escape route feature presents each connected pad as an

accessible route outside the edge of the BGA.

The PCB editor now has full support for TrueType? fonts. This gives you access to all the TrueType fonts available on your PC, including Unicode-character sets, such as Japanese. Place your company or product name in your preferred font and give your board the high-quality look it deserves.

All PCB text strings can be set to one of the PCB editor’s 3 built-in fonts, or to a TrueType font available on the PC. As well as Bold and Italic, TrueType strings can also be inverted, ideal when you need a string in the copper.

Fonts can be embedded in the PCB file by enabling the Embed TrueType fonts option in the Preferences dialog. If a TrueType font is not

embedded and the font is not available when the file is reopened on a different PC, the specified alternate system font will be used in its place. TrueType characters are rendered as region

objects when Gerber or ODB++ output is generated, giving full support through to board fabrication.

Figure 29. Use the new TrueType font support to display text

in your preferred font face.

Improved Interactive Routing

One of the most focused and intense phases of board design is routing. Altium Designer is known for its excellent interactive routing capabilities, intuitively giving you the right track width on that layer, easing the path finding process with the look-ahead feature, and instantly removing any redundant track segments when you re-route a section as you explore possible route path options.

Interactive routing draws its information from the design rules, when you select Interactive Routing and click on a pad to start routing the rules system supplies the correct track width to use on that layer, and ensures that the required clearances are maintained. While this fulfills your routing needs most of the time, as a designer you know that there are times when you need finer control over the routing process.

Altium Designer 6.0 brings a new level of control to interactive routing. While still giving you the confidence and security of the boundaries defined by the design rules, there are new options that give added flexibility in operating within them. To change the width during interactive routing you can:

1. Pick from a list of favorite widths while you route, press SHIFT + W to display the

Choose Routing Width list, click a new value, and continue routing. Edit the entries in the list via the Interactive Routing page of the Preferences dialog. 2. Alternatively, define your preferred widths for a net in the Edit Net dialog. Right-click

on any object in a net, and choose Properties from the Net Actions sub menu to open the Edit Net dialog. Or double click on the net name in the PCB panel to open the dialog. These user-choice values are stored with the net. 3. For the ultimate level of control, you can enter a specific width while you are routing.

Using Altium Designer’s generic edit on-the-fly feature that is available during

schematic or PCB object placement, pressing TAB will open the Interactive Routing for Net dialog, simply type in the new value and press ENTER to apply the value to the connection being routed.

You still have the full protection of the rules system, if the number you choose is outside the min-max rule setting then the width you get will be clipped back to the minimum or

maximum, whichever is appropriate. An intuitive extension to the interactive router’s behavior is its ability to pick up the width from existing routes. When you start routing this feature will automatically assign the

new route the same width as the existing routing. To temporarily inhibit the pickup behavior hold the SHIFT key as you start to route. Or to pickup a width from some other existing track under the cursor, press the Figure 30. Select from the list of favorite

routing widths by pressing SHIFT + W

during routing. INSERT key. Current layer objects have

higher priority.

Interactive routing options are configured in the PCB Editor – Interactive Routing page of the Preferences dialog.

Figure 31. Edit the net attributes, including the current interactive routing settings, in the Edit Net dialog.

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T: One, two, go! 和学生一起表演唱。 T:Well done ! Sit down, please. StepⅡPresentation新课呈现 1、T: Everybody, this chant is about “hobby”. Do you know “hobby”,(师边说边呈现单词“hobby”---爱好.——后面有中文) 师揭示课题:Today we’ll learn a new lesson ——Unit 6 Hobbies Lesson 11 (师导读,生跟读Unit 6 Hobbies Lesson 11) 师出示单词“hobby”和“hobbies” T:教学单词“hobby”“hobbies”生拼读,师板书 分别用Listen and point; Look and say方式来操练 师总结:hobby与hobbies 的区别。 2、T: Do you know my hobby? Look! Guess. (师打开PPT课件出现九幅图) 学生猜几个词组后,T: Yes, riding a bike is my hobby. I like riding a bike . (师板书I like …) (课件闪现以下动词词组,学生快速回答后,出现词组)Now, Let’s read these phrases. swimming ,swimming , I like swimming …. Swimming ,taking picture, playing basketball , playing football, riding my bike ,climbing the mountain, flying a kite, singing , running (师生边做边做动作)活动结束 T: Ok, very good. There are so many hobbies. Please tell me: What’s your hobby? 课件呈现句子“What’s your hobby? ”(中文意思) 教学句型,跟读,小组读。一起读,师板书句子 T: What’s your hobby? 课件再次呈现九个动词词组的图片,可让生自主回答。 S1: I like… (学生若不明白,师可引导学生说出完整的句型)

建议大家不要随便去算命

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那就走路多加小心。这样,虽然车祸是不可避免的(能避免的,也不叫算命准了),但通过自己的努力,可以把受灾的程度减轻。原本应该骨折的,因为多加注意,系了安全带,可能只是轻微挫伤。 单等命运降临,反正一切都是“命中注定”,而自己不做任何努力,消极悲观,也是不行的。命里注定你要发财,所以天天坐等,不努力,那或许走路会拣到手机,但努力了,可能就是开个手机厂。努力不努力,程度可能完全不同。 算命,就是指出一个方向,让你在合适的时间,做出合适的选择,通过命运和自身努力的共同协作,让好的更好,坏的减轻。一切都顺势而为,才能走得顺顺利利,也是算命的初衷。

不要随便说不吉利的话

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我印象最深刻的是我读小学的时候,有一位同学的弟弟,早上刚说过要上吊,下午就上吊死了。 从前,我不了解神鬼的世界,现在有点了解了,才知道,人不能随便发愿发誓,比如说,有人说:“我真想上吊死算了!”这时候,身边的恶鬼听了,马上就会通知吊死鬼来找替身,吊死鬼好不容易才等到一个机会,他不会轻易放过你的,如果你说要跳楼,跳楼鬼就会来,说跳河,水鬼来,为什么一说鬼就知道?因为鬼有五神通,如他心通,你想什么他都知道,你如果

想女色,色魔淫鬼就来,因为鬼怪要吸人的精气神三宝。鬼怪是与人类同住一空间的,只不过是人不能看见鬼,鬼却能看见人。又如人一想吃肉,开始只是想想,后来愈来愈想吃,不吃睡不着,为什么?因为恶鬼知道你想吃肉了,他便依附在你的身上,趁机吃肉的精气!所以喜欢吃肉、抽香烟、色情的人难成道、身体健康,因为身上依附在你身上的各种各样的鬼太多了。特别是在晚上不要乱说话,因为人间的晚上是阴间的白天,这时候的鬼特别多,你如说一句上吊,可能会招来成千上万的吊死鬼找你,因为

鬼的数量是人的千万倍,到时候,你想不死都难。 人发恶愿毒誓,妖魔鬼怪听到了,会想办法成全你,什么是恶愿毒誓?比如说,你想自杀,跳楼一类便是!什么是善愿?比如说,我想成佛、想得道、想利益众生等一类便是,诸佛菩萨听到了,他一定会想怎法成全你!有一些不是恶愿也不善愿,是个人的愿望,比如说,想身体健康,想升官发财一类,诸佛菩萨、护法天神、在鬼道天道修行的菩萨等听到了也会成全你,当然也要看个人的福力因缘来帮助。

不要随便顺从别人

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过啊。于是金木马归小王子,小国王却得到一匹不想要的千里马。城堡外面住着一对骗子,一个叫傻瓜骗子,一个叫聪明骗子。他们早就听说了金木马的传说,打算做个一模一样的假木马换掉金木马。当天下午,他们到城堡拜访小国王。他们对小国王说:“尊敬的陛下,我们听说您得到了一匹千里马,特意割了一车鲜草送给它。”小国王正为金木马和千里马的事情难过,非常不想要这车草。你猜他会怎么回答?他多想说:不要。”一张嘴,却说:“好两个骗子当天下午就把一车鲜草送到了马厩,他们为什么要这么做呢?这都是聪明骗子的主意,他说:“我就知道'顺从国王'从不说'不',所以我们只要把假木马藏进鲜草中就好了。”傻瓜骗子竖起大拇指说:“你真是聪明极了。”当天晚上,小国王和勋爵大人宴请邻国国王和王子,他们吃着满桌的山珍海味,欣赏着美丽的歌舞,小国王却一点儿也高兴不起来。两个骗子可没闲着,他们趁机把鲜草车推进小王子的卧室窗外,然后神不知鬼不觉地掉了包。聪明骗子本想当晚就走,傻瓜骗子却要去凑热闹看歌舞。于是他们把金木马藏进了马厩的储物室里。傻瓜骗子太匆忙了,他连储物室的门都没有关。巡逻的士兵们从这里走过,一眼就看见了金木马。他们立刻报告了小国王和勋爵大人。金木马怎么会跑到储物室里去了呢?大家谁也不相信。当金木马被推到城堡的金色大厅时,所有人都呆住了。这不就是金木马吗?小国王跑上去,抱住了金木马。邻国小王子,也上来抱住金木马。两个朋友,谁也不想让。邻国国王觉得大奇怪了,金木马不是在小王子卧室吗?于是,赶紧派人回去看看。邻国国王的卫兵回去一看,金木马正好好地放在那里呢!卫兵把假的金木马也抬到金色大厅去了。这下热闹了,怎么ー下子多出一个金木马呢!两个骗子知道是怎么回事,但他们什么也不敢说,只能干

女人请牢记,不要随便跟外人聊这些事,省得给自己惹麻烦

女人请牢记,不要随便跟外人聊这些事,省得给自己 惹麻烦 展开全文 万千人海里,幸好遇见你。 点击右上角“关注”,你的心事有我愿意听。 女人是感性“动物”,有的时候,一时不高兴就会口不择言。但我们在和别人交往时,不是所有的话都可以随口说出,逞口舌之快的同时,也许你失去的是信任,带给你的会是嘲笑、祸患。 所以,女人请牢记,不要随便跟外人聊这些事,省得给自己惹麻烦。

01 不和外人谈论自家人。 王丽,大孩子四岁,小孩子一岁了,婆婆和她一起带孩子。平时,王丽都会带孩子出去晒晒太阳,散散步。日子看着过得很不错的样子,因为她每天除了把孩子照顾好,也没其他事情可做。 有的时候出门,王丽也会跟其他的宝妈聊聊家常,当说到婆婆,她一开口就是:“我婆婆做的饭特别不好吃,衣服也不洗,很懒,一天到晚的就抱着个手机看,根本不照顾孩子。”在外人面前满是抱怨。 当她说到自己的老公,就会唠叨老公一天到晚在家就会打游戏,也不看孩子,工作上还跑去给别人送礼,结果钱也赚不了几个,真是窝囊,等等一些数落话。时间久了,别人就都知道了她有个恶婆婆,还有个无能的老公。 偶然的机会,婆婆知道自己媳妇在外面那么说自己,气的回家待了很长一段时间,老公知道了,也跟她冷战了很久。 说到底,婆婆帮你是情分,不是义务,老公是带给你幸福的,他所做的一切也都是为了家。可是最后因为你一时口快,伤了自己最亲近的人,真的有点得不偿失。 俗语说的好,家丑不可外扬,一个女人和外人聊天,最好别聊自己家里的事情,这只会是别人茶余饭后的笑谈,别人并

不会因此而同情你,你这样做的后果,只会把家里弄的鸡犬不宁。 02 不和外人聊私人感情,经济状况。 同事玲玲,刚结婚不久,经常在工作之余的时候聊自己的老公,说老公婚后的变化,性格如何,做事风格如何。过了一阵子,大家都知道她的老公是一个什么样的人,而且也都在后面议论,他们的感情不好,看她的眼光都是很怪异的感觉。其实,并没有谁的感情是一帆风顺的,每家都有吵架闹脾气的时候,但如果你把所有的事情都告诉别人,别人只会觉得是你自己当初眼光不好。自己挑的人,事后又说三道四的,怪谁呢? 还有一个同事,经常喜欢去比较谁的老公挣得多,经常说自己老公一个月也就七八千,她自我感觉良好,就经常去探讨男人挣钱能力的问题。 其实,这种女人很傻,自己老公的工资在你看来够多了,但是其他人,有的也会更高,这个时候别人也许会嘲笑你,因为在她看来,这样的收入不并怎么样。 也许有比这个更低的,他们除了会羡慕你,可能还会嫉妒你,但是这对你而言又有什么好处呢,你又得到了什么呢?说不定别人会觉得,你是一个喜欢炫耀的女人,不愿意再和你深

关于随意的说说

关于随意的说说 1、无聊的人生,无聊的动态,用无所谓的态度,过好随意而安的生活。。。 2、为何你只损跟你联系好的人由于我信任他们不会随意脱离 3、我不是玩具,不能随意玩弄。我不是大海,不能随意欺骗。 4、亲爱的,在我的世界,你可以随意的任性,因为我懂得爱你,包容你! 5、柚酒:每个人心里都有一个领地其他人不可以随意来去 6、从一个谁都愿意相信的人,变得不再那么的随意相信 7、在酒场上,最给力的一句话:你们干了,我随意。 8、知道我们两个人像什么吗就像在一起喝酒我干杯你随意 9、[有时候,受了委屈,本来想哭,可是只要别人一问你怎么,就会忍不住留眼泪]我知道补会火,大家随意就好 10、她们可以任意喜欢一个人然后在随意忘记一个人 11、别说我好,我没那么好;别说我不好,我也没那么差;我就是我,爱与不爱,你随意。 12、我喜欢你和你无关所以你随意我继续 13、你只是随意的放了一个屁,却影响了我一阵心情 14、我知道很多爱情亦如喝酒一人干杯一人却随意/ 15、为了讨好就迎合吗别犯傻了大胆做自己好吗向左走还是

向右走就随意走没有谁一定要为了谁怎样 16、信任是用在你可以信任的人身上的。不要随意的去信任一个带着面具的人,不然你就输了。 17、别给他人随意妄下结论,你那点可怜的直觉有什么资格呢 18、我终于知道为什么我怎么样都感动不了他我难受了他不在意我生病了不会关心我给他我的所有他也随意丢弃只是 19、如果我和你说话客气.只说明你对我来说是陌生的.如果我和你说话随意.证明我想和你好.你的态度决定我的态 20、工作再累,也不要抱怨,因为没有人无条件替你干;生命再长,也不要随意作践,因为没有人为你的健康买单; 21、我没说我漂亮。不喜欢请绕路走。我不会与狗计较。你很漂亮可以做鸡。祝你生意兴隆。不要随意评论我的好与 22、日本你们知道吗,随意篡改历史是不对的。. 23、他说:你高兴,我随意! 24、我有洁癖请别随意侵犯 25、我们之间的爱情就像喝酒一样永远是我干杯你随意! 26、让一切回忆归零后会无期受不了你随意冷落的打击别再说风雨过后一定是天晴恶劣的天气 27、不要随意交朋友,因为每个人都带着面具,而摘下面具的人心,又有谁看得清? 28、我承认,我爱你,但并不代表你就可以随意践踏我的尊严。 29、喂!你不要仗着我喜欢你,你就随意欺负我,小心我会变

不要随便放纵自己

不要随便放纵自己 学会善待自己,做对自己负责任的主人。学会管理自己,养成良好的习惯。 小布生日的时候,全家人一起去游乐场玩。“我要冰淇淋。”“我要擎天柱。”……小布看到什么都想要,连摩天轮都不坐,就要玩具,爸爸妈妈脸都愁黑了。正巧游乐园的一个橱窗里放着一个神气的士兵,快看,他明明在朝小布眨眼睛呢!小布一定要带它回家。爸爸不肯,小布就躺在地上哇哇大哭,就是不起来。爷爷心疼他,只好买下了这个士兵,不过家人都叫它“任性士兵”。小布很喜欢它,去哪儿都带着它,睡觉也抱着它。因为它最知道小布想要啥,还帮小布出主意得到它们。小布觉得自己长大了,想要什么,就该有什么。小布喜欢模型,家里就有了各种车的模型:救护车、大吊车、洒水车、小汽车,甚至还有带轨道的过山车和小火车。飞机模型也不少:波音客机、直升机、战斗机等等。埃菲尔铁塔、鸟巢、悉尼大剧院……各种各样,一应俱全。它们堆满了架子、书柜、地面,就要入侵小布的床了。任性士兵却说:“不多,不多。”小布只好每天睡觉的时候,把玩具推到地上。玩具们被胡乱扔了一地,一点儿也不高兴,它们对小布说:“请你把我们整理好,行吗?这里真是太挤了。”小布刚把床上堆积的玩具整理好,就已经气喘呼呼了。“我的玩具是不是太多了?”小布问,任性士兵却说:“不多,不多。”它还想了个坏主意:让小布把玩具们全都塞在了床底下。玩具们像罐头里的沙丁鱼一样,紧紧挤在一起,太难受了。任性士兵和小布却说:“这下屋子可宽敞多了。”玩具挤在了床底下,

小布一次也想不起跟它们玩了。他有了新爱好——买书,童话书、手工书、立体书,爸爸都不敢带他去书店了,他看到书就要买。天啊,来看看小布的房间什么样吧!看了一半的书都堆在床头,新书都堆在架子上。它们一本一本都还没有打开包装呢!小布看着这些书有些头痛:我的书是不是太多了!任性士兵却告诉他:不多,不多,你这不是为了学知识吗?这真是一个好理由啊!小布的房间里放不下了,走廊上、客厅里都是他的书籍、玩具,甚至还有平板电脑呢。妈妈每天跟在小布后面,都整理不过来,现在妈妈也不想管它们了。不过它们很快要失宠了,这是怎么回事呢?小布家的邻居要搬去很远的地方了,不能把狗狗豆豆带走。小布挺起胸膛说:“让我来照顾豆豆吧1!”妈妈却连忙说:“不行,不行,小布连玩具们都照顾不了呢!”小布不管,就想要豆豆。任性士兵也跟他说:“每个男孩都该有一条狗呢!”小布噘着嘴,不吃饭,一连饿了三天。全家人没办法,只好同意了。小布高兴极了,和任性士兵击掌庆祝呢。不过,爸爸立下规矩:“豆豆归小布管。”这下小布摸摸头,要想想看呢。任性士兵却说:“哼,我可听说每个男孩子一定要有一条狗呢!”豆豆真是个小可爱,它大大的眼睛,全身雪白、毛茸茸的,但是有个大缺点——拉屎。一粒,一粒,硬硬的,臭臭的,小布要把它们清理干净。这可是一项有味道的工作,小布都要累坏了。可是豆豆这个小淘气,一点儿也不累。它把小布的房间翻了个底朝天,图画书、小汽车、埃菲尔铁塔……都被翻出来了。整整一个房间,堆满了小布的玩具、书和模型,小布真不知道自己有这么多东西呢!任性要东西真是太可怕了。爸爸妈妈都生气了,他们命令小布:“把你的房间整理好。”沾满灰尘的玩具要一件一件擦干净,放在不同的箱子里;被豆豆撞散的模型,要一件一件找全收起来,这

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