AD9959数据手册（部分）
GENERAL DESCRIPTION概述
The AD9959 consists of four direct digital synthesizer (DDS) cores that provide independent frequency, phase, and amplitude control on each channel. This flexibility can be used to correct imbalances between signals due to analog processing, such as filtering, amplification, or PCB layout-related mismatches. Because all channels share a common system clock, they are inherently synchronized. Synchronization of multiple devices is supported. The AD9959 can perform up to a 16-level modulation of frequency, phase, or amplitude (FSK, PSK, ASK). Modulation is performed by applying data to the profile pins. In addition, the AD9959 also supports linear sweep of frequency, phase, or amplitude for applications such as radar and instrumentation.
AD9959含有四个直接数字频率合成器（DDS），提供各通道独立的频率、相位和振幅控制。这种灵活性可以用来纠正信号之间的不平衡，这种不平衡是由于模拟处理，如滤波，放大，或PCB布局相关的不匹配导致。因为所有通道共用一个系统时钟，因此固有的同步。也支持多个设备的同步。AD9959可以执行16级频率、相位、振幅（FSK，PSK，ASK）调制，通过将数据传到配置引脚执行。此外，AD9959还支持频率、线性扫频、相位或振幅的应用，如雷达和仪表。
The AD9959 serial I/O port offers multiple configurations to provide significant flexibility. The serial I/O port offers an SPI- compatible mode of operation that is virtually identical to the SPI operation found in earlier Analog Devices, Inc., DDS products. Flexibility is provided by four data pins (SDIO_0/SDIO_1/ SDIO_2/SDIO_3) that allow four programmable modes of serial I/O operation.
AD9959的串行I/O端口提供了多种配置，提供显著的灵活性。串行I / O端口提供了一个SPI兼容的操作模式，SPI操作与较早的模拟设备公司DDS产品几乎相同。灵活性是通过四个数据引脚（sdio_0 / sdio_1 /sdio_2 / sdio_3）允许四可编程串行I/O操作模式来实现的。
The AD9959 uses advanced DDS technology that provides low power dissipation with high performance. The device incorporates four integrated, high speed 10-bit DACs with excellent wideband and narrow-band SFDR. Each channel has a dedicated 32-bit frequency tuning word, 14 bits of phase offset, and a 10-bit output scale multiplier.
AD9959采用先进的DDS技术，提供低高性能低功耗。该器件集成了四个高速10位DAC 具有优良的宽带和窄带SFDR。每个通道有一个专门的32位频率调谐字，14位相位偏移，和一个10位幅度调节输出。
The DAC outputs are supply referenced and must be terminated into AVDD by a resistor or an AVDD center-tapped transformer. Each DAC has its own programmable reference to enable different full-scale currents for each channel. The DDS acts as a high resolution frequency divider with the REFCLK as the input and the DAC providing the output. The REFCLK input source is common to all channels and can be driven directly or used in combination with an integrated REFCLK multiplier (PLL) up to a maximum of 500 MSPS. The PLL multiplication factor is programmable from 4 to 20, in integer steps. The REFCLK input also features an oscillator circuit to support an external crystal as the REFCLK source. The crystal must be between 20 MHz and 30 MHz. The crystal can be used in combination with the REFCLK multiplier.
DAC的输出供给参考必须通过电阻接到AVDD或接到AVDD中心抽头变压器。每个DAC 有自己的可编程参考，能提供各通道的不同满量程电流。REFCLK作为输入时，DDS核心作为一个高分辨率分频器，以DAC提供输出。REFCLK输入源对所有通道是一样的，可直接驱动或用于与一个集成的REFCLK乘法器组合（PLL），最高500 MSPS。PLL倍增因子可编程，从4到20的整数。REFCLK输入还可作为一个振荡器电路，支持外部晶振作为参考源。该晶振必须介于20兆赫和30兆赫。晶振可用于与REFCLK倍频组合。
The AD9959 comes in a space-saving 56-lead LFCSP package. The DDS core (AVDD and DVDD pins) is powered by a 1.8 V supply. The digital I/O interface (SPI) operates at 3.3 V and requires DVDD_I/O (Pin 49) be connected to 3.3 V. The AD9959 operates over the industrial temperature range of ?40°C to +85°C.
AD9959使用节省空间的56引脚LFCSP封装。DDS的核心（AVDD和DVDD引脚）由1.8 V 供电。数字I / O接口（SPI）的工作在3.3 V，要求dvdd_I/O（引脚49）连接到3.3 V。AD9959可运行在超过工业温度范围的-40°C到85°C。
ABSOLUTE MAXIMUM RATINGS 绝对最大额定值
Table 2. 表2
Parameter参数Rating 额定值
Maximum Junction Temperature 最大结温150°C
DVDD_I/O (Pin 49) 4 V
AVDD, DVDD 2 V
Digital Input Voltage (DVDD_I/O = 3.3 V)数字输入电压?0.7 V to +4 V
Digital Output Current数字输出电流 5 mA
Storage Temperature Range 存储温度–65°C to +150°C
Operating Temperature Range操作温度–40°C to +85°C
Lead Temperature (10 sec Soldering) 焊接温度300°C
θJA 21°C/W
θJC 2°C/W
THEORY OF OPERATION 操作原理
DDS CORE DDS核心
The AD9959 has four DDS cores, each consisting of a 32-bit phase accumulator and phase-to-amplitude converter. Together, these digital blocks generate a digital sine wave when the phase accumulator is clocked and the phase increment value (frequency tuning word) is greater than 0. The phase-to-amplitude converter simultaneously translates phase information to amplitude information by a cos(θ) operation. The output frequency (fOUT) of each DDS channel is a function of the rollover rate of each phase accumulator. The exact relationship is given in the following equation:
AD9959有四个DDS内核，每个含32相位累加器和相位-幅度转换器。这些数字模块在一起产生数字正弦波，当相位累加器的时钟和相位增量值（频率调谐字）大于0。相位幅度转换器同时通过COS（θ）操作，转换相位信息到幅度信息。每个DDS通道输出频率（f out）是每个相位累加器的转换函数。确切的关系在下面的等式中给出：
f out=FTW(f s)
32
where: f S is the system clock rate.
FTW is the frequency tuning word and is 0 ≤FTW ≤231.
232 represents the phase accumulator capacity.
其中：
f s是系统时钟速率。
FTW是频率调谐字和0≤FTW≤231。
232表示相位累加器容量。
Because all four channels share a common system clock, they are inherently synchronized.
因为所有四个通道共用一个系统时钟，他们是本质同步的。
The DDS core architecture also supports the capability to phase offset the output signal, which is performed by the channel phase offset word (CPOW). The CPOW is a 14-bit register that stores a phase offset value. This value is added to the output of the phase accumulator to offset the current phase of the output signal. Each channel has its own phase offset word register. This feature can be used for placing all channels in a known phase relationship relative to one another.
The exact value of phase offset is given by the following equation:
?=POW 214×360° DDS 的核心架构还支持输出信号的相位偏移，由信道的相位偏移（cpow ）字实现。cpow 是一个14位的寄存器，存储相位偏移值。此值添加到相位累加器的输出，偏移电流信号相位。每个通道都有自己的相位偏移字寄存器。此功能可用于设置所有通道的相位相关关系。相位偏移量实际值由以下方程给出：
DIGITAL-TO-ANALOG CONVERTER 数模转换
The AD9959 incorporates four 10-bit current output DACs. The DAC converts a digital code (amplitude) into a discrete analog quantity. The DAC current outputs can be modeled as a current source with high output impedance (typically 100 k Ω). Unlike many DACs, these current outputs require termination into AVDD via a resistor or a center-tapped transformer for expected current flow.
AD9959采用四个10位电流输出DAC 。DAC 将数字代码（幅度）转换成离散的模拟量。DAC 的电流输出可以被建模为高输出阻抗的电流源（通常为100 K Ω）。不像许多DAC ，这些电流输出要求通过电阻器或中心抽头变压器接到AVDD 以获得预期的电流。
Each DAC has complementary outputs that provide a combined full-scale output current (I OUT + I OUT ____
). The outputs always sink current, and their sum equals the full-scale current at any point in time. The full-scale current is controlled by means of an external resistor (RSET) and the scalable DAC current control bits discussed in the Modes of Operation section. The resistor, RSET, is connected between the DAC_RSET pin and analog ground (AGND). The full-scale current is inversely proportional to the resistor value as follows: Rset =18.91Iout(max)
每个DAC 互补输出提供一个组合的满量程输出电流（输出电流和输入电流）。输出总是吸收电流，在任何时间点它们的和等于满量程电流。满量程电流通过一个外部电阻器（RSET ）控制和操作模式部分中讨论的DAC 的电流位进行尺度控制。电阻RSET ，连接DAC_REST 脚和模拟地（AGND ）之间。满量程电流与电阻值成反比：
The maximum full-scale output current of the combined DAC outputs is 15 mA, but limiting the output to 10 mA provides optimal spurious-free dynamic range (SFDR) performance. The DAC output voltage compliance range is AVDD + 0.5 V to AVDD ? 0.5 V. Voltages developed beyond this range may cause excessive harmonic distortion. Proper attention should be paid to the load termination to keep the output voltage within its compliance range. Exceeding this range could potentially dam-age the DAC output circuitry.
最大满量程的输出组合DAC 电流为15 mA ，但限制输出到10毫安以提供最优的无杂散动态范围（SFDR ）性能。DAC 的输出电压范围为AVDD + 0.5 V 电压AVDD?0.5V 。超出了这个范围可能会导致谐波失真过大。应注意负载，以保持其输出电压在其合规范围。超过这个范围可能损坏DAC 输出电路。
MODES OF OPERATION 操作模式
There are many combinations of modes (for example, single- tone, modulation, linear sweep) that the AD9959 can perform simultaneously. However, some modes require multiple data pins, which can impose limitations. The following guidelines can help determine if a specific combination of modes can be performed simultaneously by the AD9959.
有许多组合模式（例如，单音，调制，线性扫频），AD9959能够同时进行。然而，一些模式需要多个数据引脚，它可以施加限制。下面的指南可以帮助确定模式的特定组合是否可以用AD9959同时进行。
CHANNEL CONSTRAINT GUIDELINES通道约束准则
2Single-tone mode, two-level modulation mode, and linear sweep mode can be enabled on any channel and in any combination at the same time
单音模式，两电平调制模式，线性扫频繁模式，可以启用在任何通道，并在同一时间任何组合。
2Any one or two channels in any combination can perform four-level modulation. The remaining channels can be in single-tone mode.
任何一个或两个通道可在任何组合执行四电平调制。剩余的通道可以在单音模式。
2Any channel can perform eight-level modulation. The three remaining channels can be in single-tone mode.
任何一个通道都可以执行八电平调制。三个剩余信道可以在单音模式。
2Any channel can perform 16-level direct modulation. The three remaining channels can be in single-tone mode.
任何一个通道都可以执行16电平直接调制。三个剩余信道可以在单音模式。
2The RU/RD function can be used on all four channels in single-tone mode. See the Output Amplitude Control Mode section for the RU/RD function.
所有四个通道可以在单音模式下使用RU / RD功能。见输出幅度控制块。
2When Profile Pin P2 and Profile Pin P3 are used for RU/RD, any two channels can perform two-level modulation with RU/RD or any two channels can perform linear frequency or phase sweep with RU/RD. The other two channels can be in single-tone mode.
当配置引脚P2和配置引脚P3用于RU/ RD，任何两个通道可以执行二电平调制与RU/ RD，或任何两个通道可以执行线性频率或相位扫描与RU/RD。其他两个通道可以处于单音模式。
2When Profile Pin P3 is used for RU/RD, any channel can be used in eight-level modulation with RU/RD. The other three channels can be in single-tone mode.
当配置引脚P3用于RU/ RD，任何通道可以用在八电平调制与RU/RD，另三通道可以在单音模式。
?When the SDIO_1, SDIO_2, and SDIO_3 pins are used for RU/RD, any one or two channels, any three channels, or all four channels can perform two-level modulation with RU/RD. Any channels not in the two-level modulation can be in single-tone mode.
当sdio_1，sdio_2，和sdio_3引脚用于RU/RD，任何一个或两个通道，三通道，四通道或可以进行两级调制。其它任何通道不在两级调制的，可以处于单音模式。
?When the SDIO_1, SDIO_2, and SDIO_3 pins are used for RU/RD, any one or two channels can perform four-level modulation with RU/RD. Any channels not in four-level modulation can be in single-tone mode.
当sdio_1，sdio_2，和sdio_3引脚用于RU/RD，任何一个或两个通道可以进行四级调制。其它任何通道进行单频模式。
?When the SDIO_1, SDIO_2, and SDIO_3 pins are used for RU/RD, any channel can perform
16-level modulation with RU/RD. The other three channels can be in single-tone mode.
当sdio_1，sdio_2，和sdio_3引脚用于RU/RD，任何一个通道可以进行16级调制，其他三个渠道可以在单频模式。
?Amplitude modulation, linear amplitude sweep modes, and the RU/RD function cannot operat
e simultaneously, but frequency and phase modulation can operate simultaneously as the RU/RD function.
振幅调制，线性振幅扫描模式，和RU/ RD功能不能同时操作，但是，频率和相位调制可以同时随着RU/RD功能操作。
POWER SUPPLIES 电源供应
The AVDD and DVDD supply pins provide power to the DDS core and supporting analog circuitry. These pins connect to a 1.8 V nominal power supply. The DVDD_I/O pin connects to a 3.3 V nominal power supply. All digital inputs are 3.3 V logic except for the CLK_MODE_SEL input. CLK_MODE_SEL (Pin 24) is an analog input and should be operated by 1.8 V logic.
AVDD和DVDD引脚提供DDS核心的电力供应，和支持模拟电路。这些引脚连接到1.8 V额定电源。dvdd_I/O引脚连接到3.3 V额定电源。所有数字输入3.3 V逻辑，除了clk_mode_sel输入。clk_mode_sel（引脚24）是一个模拟输入和应由1.8伏逻辑操作。
SINGLE-TONE MODE 单音模式
Single-tone mode is the default mode of operation after a master reset signal. In this mode, all four DDS channels share a common address location for the frequency tuning word (Register 0x04) and phase offset word (Register 0x05). Channel enable bits are provided in combination with these shared addresses. As a result, the frequency tuning word and/or phase offset word can be independently programmed between channels (see the following Step 1 through Step 5). The channel enable bits do not require an I/O update to enable or disable a channel.
单音模式是主复位信号后的缺省操作模式。在这种模式下，所有四个DDS通道共享频率调谐字（寄存器0x04）和相位偏移字（寄存器0x05）。通道使能位与这些共享地址组合使用。作为结果，频率调谐字和/或相位偏移字可以在通道之间独立编程（见下面步骤1到步骤5）。通道使能位不要求I/O更新使能或禁用信道。
See the Register Maps and Bit Descriptions section for a description of the channel enable bits in the channel select register (CSR, Register 0x00). The channel enable bits are enabled or disabled immediately after the CSR data byte is written.
请参见寄存器映射和位描述部分，信道使能位的描述在通道选择寄存器（CSR，寄存器0x00）。在CSR数据字节写入后，通道使能位立即使能或禁用。
Address sharing enables channels to be written simultaneously, if desired. The default state enables all channel enable bits. Therefore, the frequency tuning word and/or phase offset word is common to all channels but written only once through the serial I/O port.
如果需要的话，地址共享使信道能够同时写入。默认状态启用所有通道使能位。因此，频率调谐字和/或相位偏移字是所有通道共用的，可以只通过串行输入输出端口写一次。
The following steps present a basic protocol to program a different frequency tuning word and/or phase offset word for each channel using the channel enable bits.
下面的步骤介绍了一个基本的协议，用来使用通道使能位对每个通道编程实现不同频率调谐字和/或相位偏移字。
1．Power up the DUT and issue a master reset. A master reset places the part in single-tone mode and single-bit mode for serial programming operations (refer to the Serial I/O Modes of Operation section). Frequency tuning words and phase offset words default to 0 at this point.
DUT上电和执行主复位。主复位将部件置于单音模式和单位模式串行编程操作（参照串行I/O模式操作部分）。频率调谐字和相位偏移字默认为0在这一点上。
2. Enable only one channel enable bit (Register 0x00) and disable the other channel enable bits.
只让一个通道使能位使能（寄存器0x00）和禁用其他通道使能位。
3. Using the serial I/O port, program the desired frequency tuning word (Register 0x04) and/or the phase offset word (Register 0x05) for the enabled channel.
使用串行I/O口，为使能通道的频率调谐字（寄存器0x04）和/或相位偏移字（寄存器0x05）编程。
4. Repeat Step 2 and Step 3 for each channel.
每个通道重复步骤2和步骤3。
5．Send an I/O update signal. After an I/O update, all channels should output their programmed frequency and/or phase offset value.
发送I/O更新信号。在I/O更新后，所有通道应输出其编程频率和/或相位偏移值。
Single-Tone Mode—Matched Pipeline Delay单音模式匹配管道延迟
In single-tone mode, the AD9959 offers matched pipeline delay to the DAC input for all frequency, phase, and amplitude changes. This avoids having to deal with different pipeline delays between the three input ports for such applications. The feature is enabled by asserting the matched pipe delays active bit found in the channel function register (CFR, Register 0x03). This feature is available in single-tone mode only
在单频模式，对于DAC输入的所有频率，相位和振幅的变化提供相匹配的AD9959管道延迟。这避免了此类应用处理这些三个输入端口之间的不同管道延迟。该功能是通过维持在通道功能寄存器（CFR，寄存器0x03）中的匹配管道延迟活动位实现。此功能仅适用于单音模式。
REFERENCE CLOCK MODES参考时钟模式
The AD9959 supports multiple reference clock configurations to generate the internal system clock. As an alternative to clocking the part directly with a high frequency clock source, the system clock can be generated using the internal, PLL-based reference clock multiplier. An on-chip oscillator circuit is also available for providing a low frequency reference signal by connecting a crystal to the clock input pins. Enabling these features allows the part to operate with a low frequency clock source and still provide a high update rate for the DDS and DAC. However, using the clock multiplier changes the output phase noise characteristics. For best phase noise performance, a clean, stable clock with a high slew is required (see Figure 17 and Figure 18).
AD9959支持参考时钟的多个配置，产生内部的系统时钟。作为一种选择，部件时钟直接使用一个高频率的时钟源，系统时钟可以使用内部，基于PLL参考时钟乘法器生成。一个片上振荡器电路也可通过连接晶体的时钟输入引脚，提供一个低频参考信号。启用这些功能，允许部件操作低频时钟操作源，仍然可以提供一个高更新速率的DDS和数模转换器。然而，要使用时钟乘法器改变输出相位噪声特性。对于最佳相位噪声性能，高转换速率时一个干净，
稳定的时钟是必需的（见图17图18）。
SCALABLE DAC REFERENCE CURRENT CONTROL MODE可缩放DAC参考电流控制模式RSET is common to all four DACs. As a result, the full-scale currents are equal by default. The scalable DAC reference can be used to set the full-scale current of each DAC independent from one another. This is accomplished by using the register bits CFR[9:8]. Table 5 shows how each DAC can be individually scaled for independent channel control. This scaling provides for binary attenuation.
RSET是所有四个DAC共用的。其结果是，满量程电流在缺省情况下相等。可缩放DAC 参考用于设置每个DAC独立的满量程电流。这是通过使用寄存器位CFR [ 9:8]完成。表5显示了如何让每个DAC可以单独缩放独立的信道控制。这个缩放提供二进制衰减。
Table 5. DAC Full-Scale Current 表5 DAC满量程电流
CFR[9:8] LSB Current State LSB的当前状态
11 Full scale 全尺度
01 Half scale 半尺度
10 Quarter scale 四分之一尺度
00 Eighth scale 八分之一尺度
POWER-DOWN FUNCTIONS断电功能
The AD9959 supports an externally controlled power-down feature and the more common software programmable power-down bits found in previous Analog Devices DDS products. The software control power-down allows the input clock circuitry, the DAC, and the digital logic (for each separate channel) to be individually powered down via unique control bits (CFR[7:6]). These bits are not active when the externally controlled power-down pin (PWR_DWN_CTL) is high. When the input pin, PWR_DWN_CTL, is high, the AD9959 enters a power-down mode based on the FR1[6] bit. When the PWR_DWN_CTL input pin is low, the external power-down control is inactive. When FR1[6] = 0 and the PWR_DWN_CTL input pin is high, the AD9959 is put into a fast recovery power-down mode. In this mode, the digital logic and the DAC digital logic are powered down. The DAC bias circuitry, PLL, oscillator, and clock input circuitry are not powered down.
AD9959支持外部控制的断电功能和更常见的软件可编程断电位，同AD公司以前的DDS 产品。软件控制关机通过唯一的控制位（CFR [ 7：6 ]）允许输入时钟电路，DAC，和数字逻辑（每个单独的通道）被单独断电。这些位不活跃，当外部控制电源关引脚（pwr_dwn_ctl）高时。当输入引脚，pwr_dwn_ctl，高时，AD9959基于FR1 [ 6 ]位模式进入断电模式。当pwr_dwn_ctl 输入引脚低，外部电源关断控制处于非活动状态。当FR1 [ 6 ] = 0，pwr_dwn_ctl输入引脚为高，AD9959进入掉电快速恢复模式。在这种模式下，数字逻辑和DAC数字逻辑断电。DAC偏置电路，锁相环，振荡器和时钟输入电路没有断电。
When FR1[6] = 1 and the PWR_DWN_CTL input pin is high, the AD9959 is put into full power-down mode. In this mode, all functions are powered down. This includes the DAC and PLL, which take a significant amount of time to power up. When the PLL is bypassed, the PLL is shut down to conserve power. When the PWR_DWN_CTL input pin is high, the individual power-down bits (CFR*7:6+ and FR1*7+) are invalid (don’t care) and unused. When the PWR_DWN_CTL input pin is low, the individual power-down bits control the power-down modes of operation. Note that the power-down signals are all designed such that Logic 1 indicates the low power mode and Logic 0
indicates the powered-up mode.
当FR1 [ 6 ] = 1，pwr_dwn_ctl输入引脚为高，AD9959进入全面断电模式。在这种模式下，所有功能断电。这包括DAC和PLL，这需要大量的时间来上电。当锁相环被旁通，PLL关闭以节省电力。当pwr_dwn_ctl输入引脚为高，独立的关电位（CFR [ 7：6 ]和FR1 [ 7 ]无效）（不用管）未使用。当pwr_dwn_ctl输入引脚是低时，独立掉电位控制掉电操作模式。请注意，掉电信号都是这样设计的逻辑1表示低功耗模式和逻辑0表示上电模式。
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OUTPUT AMPLITUDE CONTROL MODE输出幅度控制模式The 10-bit scale factor (multiplier) controls the ramp-up and ramp-down (RU/RD) time of an on/off emission from the DAC. In burst transmissions of digital data, it reduces the adverse spectral impact of abrupt bursts of data. The multiplier can be bypassed by clearing the amplitude multiplier enable bit (ACR[12] = 0).
10位比例因子（乘法器）控制DAC的开/关输出的斜坡上升和斜坡下降（RU/ RD）时间。在数字数据突发传输时，它减少了突发数据不利的谱影响。该乘法器可以被旁通，通过清除幅度乘法器使能位（ACR [ 12 ] = 0）。
Automatic and manual RU/RD modes are supported. The automatic mode generates a zero-scale up to a full-scale (10 bits) linear ramp at a rate determined by ACR (Register 0x06). The start and direction of the ramp can be controlled by either the profile pins or the SDIO_1/SDIO_2/SDIO_3 pins. Manual mode allows the user to directly control the output amplitude by manually writing to the amplitude scale factor value in the ACR (Register 0x06). Manual mode is enabled by setting ACR[12] = 1 and ACR[11] = 0.
支持自动和手动RU/ RD模式。自动模式生成一零尺度到满量程（10位）线性斜坡速率由，由ACR（寄存器0x06）确定。这个斜坡的开始和方向可以控制，通过配置引脚或sdio_1 / sdio_2 / sdio_3引脚。手动模式允许用户通过在ACR（寄存器0x06）编写振幅比例因子值，直接控制输出幅度。手动模式使能是通过设置ACR [ 12 ] = 1和ACR [ 11 ] = 0。
Automatic RU/RD Mode Operation 自动RU/RD操作模式
Automatic RU/RD mode is active when both ACR[12] and ACR[11] are set. When automatic RU/RD is enabled, the scale factor is internally generated and applied to the multiplier input port for scaling the output. The scale factor is the output of a 10-bit counter that increments/decrements at a rate set by the 8-bit output ramp rate register. The scale factor increments if the external pin is high and decrements if the pin is low. The internally generated scale factor step size is controlled by ACR[15:14]. Table 21 describes the increment/decrement step size of the internally generated scale factor per ACR[15:14].
当ACR[12]和ACR [ 11 ]被设置时，自动RU/ RD模式激活。当启用自动RU/ RD，比例因子在内部生成并应用到乘法器输入端口以缩放输出。比例因子是一个10位的计数器，递增/递减的速率由8位输出斜坡速率寄存器设置。外部引脚是高时比例因子递增，如果引脚是低比例因子递减。内部生成比例因子步长是由ACR [ 15:14 ]控制。表21描述了每ACR [ 15:14 ]内部产生的比例因子递增/递减的步长。
A special feature of this mode is that the maximum output amplitude allowed is limited by the contents of the amplitude scale factor (ACR[9:0]). This allows the user to ramp to a value less than full scale.
这种模式的一个特殊之处是，允许的最大输出振幅是有限的，由比例因子（ACR [ 9：0 ]）的内容确定。这允许用户斜率到一个小于满刻度的值。
Ramp Rate Timer缓变率定时器
The ramp rate timer is a loadable down counter that generates the clock signal to the 10-bit counter that generates the internal scale factor. The ramp rate timer is loaded with the value of the LSRR (Register 0x07) each time the counter reaches 1 (decimal). This load and countdown operation continues for as long as the timer is enabled unless the timer is forced to load before reaching a count of 1. If the load ARR at I/O_UPDATE bit (ACR[10]) is set, the ramp rate timer is loaded at an I/O update, a change in profile input, or upon reaching a value of 1. The ramp timer can be loaded before reaching a count of 1 by three methods.
缓变速率定时器是一个可加载递减计数器，产生时钟信号到10位计数器，生成内部比例因子。每次计数器达到1（十进制）时，缓变速率定时器加载LSRR（寄存器0x07）的值。只要定时器启用，负载和减计数操作继续，除非计时器是达到计数1之前被迫加载。如果负载ARR在I/ o_update位（ACR [ 10 ]）被设定，缓变速率定时器在一个I / O更新，在输入的变化，或在到达一个值1时加载。斜坡计时器可以在达到1计数之前用三种方法加载。
? In the first method, the profile pins or the SDIO_1/ SDIO_2/SDIO_3 pins are changed. When the control signal changes state, the ACR value is loaded into the ramp rate timer, which then proceeds to count down as normal.
在第一种方法中，配置引脚或sdio_1 / sdio_2 / sdio_3引脚改变。当控制信号状态变化，ACR值加载到斜坡速率定时器，然后进行正常计数。
?In the second method, the load ARR at I/O_UPDATE bit (ACR[10]) is set, and an I/O update is issued.
第二方法，负载ARR在I/ o_update位（ACR [ 10 ]）设定，和一个I / O更新发布。
?The third method is to change from inactive automatic RU/RD mode to active automatic RU/RD mode.
第三种方法是从非活动自动RU/ RD模式改变到激活自动RU/ RD模式。
RU/RD Pin-to-Channel Assignment RU/RD引脚通道分配
When all four channels are in single-tone mode, the profile pins are used for RU/RD operation. When linear sweep and RU/RD are activated, the SDIO_1/ SDIO_2/SDIO_3 pins are used for RU/RD operation. In modulation mode, refer to the Modulation Mode section for pin assignments.
当所有四个通道在单音模式，配置文件引脚用于RU/ RD操作。当线性扫描和RU／RD被激活，sdio_1 / sdio_2 / sdio_3引脚用于RU/RD操作。在调制模式，请参阅调制模式部分引脚
分配。
I/O_UPDATE, SYNC_CLK, AND SYSTEM CLOCK RELATIONSHIPS
I/o_update，sync_clk，与系统时钟关系
I/O_UPDATE and SYNC_CLK are used together to transfer data from the serial I/O buffer to the active registers in the device. Data in the buffer is inactive. SYNC_CLK is a rising edge active signal. It is derived from the system clock and a divide-by-4 frequency divider. The SYNC_CLK, which is externally provided, can be used to synchronize external hardware to the AD9959 internal clocks. I/O_UPDATE initiates the start of a buffer transfer. It can be sent synchronously or asynchronously relative to the SYNC_CLK.
I/ o_update和sync_clk一起使用来传递数据，从串行I / O缓冲器到活动寄存器。缓冲区中的数据处于非活动状态。sync_clk是一个上升沿触发信号。这是来自系统时钟分频器和分频数是4。外部提供的sync_clk，可以用来同步外部硬件到AD9959的内部时钟。I/ o_update启动缓冲传输开始。它可以相对于sync_clk同步或异步发送。
If the setup time between these signals is met, then constant latency (pipeline) to the DAC output exists. For example, if repetitive changes to phase offset via the SPI port is desired, the latency of those changes to the DAC output is constant; otherwise, a time uncertainty of one SYNC_CLK period is present. The I/O_UPDATE is essentially oversampled by the SYNC_CLK. Therefore, I/O_UPDATE must have a minimum pulse width greater than one SYNC_CLK period. The timing diagram shown in Figure 40 depicts when data in the buffer is transferred to the active registers.
如果满足这些信号之间的设置时间，则存在DAC输出常数延迟（流水线）。例如，如果通过SPI端口需要重复的相位偏移，这些变化对DAC的输出延迟是恒定的；否则，一个sync_clk 周期时间存在不确定性。I/ o_update本质上是过采样的sync_clk。因此，I/o_update必须具有超过一sync_clk周期的最小脉冲宽度。图40所示的时序图描绘了数据由缓冲区转移到主动寄存器。
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SERIAL I/O PORT串口
OVERVIEW 概述
The AD9959 serial I/O port offers multiple configurations to provide significant flexibility. The serial
I/O port offers an SPI- compatible mode of operation that is virtually identical to the SPI operation found in earlier Analog Devices DDS products. The flexibility is provided by four data pins (SDIO_0, SDIO_1, SDIO_2, SDIO_3) that allow four programmable modes of serial I/O operation.
AD9959
AD9959的串行I/O端口提供了多种配置，提供显著的灵活性。串行I / O端口提供了一个SPI 兼容的操作模式，几乎相同的SPI操作也存在于早期DDS模拟器件产品。灵活性是通过四个数据引脚提供（sdio_0，sdio_1，sdio_2，sdio_3）允许四种可编程串行I/O操作模式。
Three of the four data pins (SDIO_1, SDIO_2, SDIO_3) can be used for functions other than serial I/O port operation. These pins can also be used to initiate a ramp-up or ramp-down (RU/RD) of the 10-bit amplitude output scalar. In addition, SDIO_3 can be used to provide the SYNC_I/O function that resynchronizes the serial I/O port controller if it is out of proper sequence.
4个数据引脚中的3个，（SDIO数据引脚1 2 3）可以用于其它非串行I／O端口操作功能。该引脚也可以用来启动幅度输出的10位标量的斜坡上升或斜坡向下（RU / RD）。此外，SDIO_3 可用于提供同步I / O功能，再同步串行I/O端口的控制器，如果它是处于正确的序列之外。
The maximum speed of the serial I/O port SCLK is 200 MHz, but the four data pins (SDIO_0, SDIO_1, SDIO_2, SDIO_3) can be used to further increase data throughput. The maximum data throughput using all the SDIO pins (SDIO_0, SDIO_1, SDIO_2, SDIO_3) is 800 Mbps.
串行I/O端口SCLK的最大速度为200兆赫，但四个数据引脚（sdio_0，sdio_1，sdio_2，sdio_3）可以用来增加数据吞吐量。使用SDIO引脚的最大的数据吞吐量（sdio_0，sdio_1，sdio_2，sdio_3）是800 Mbps。
Note that all channels share Register 0x03 to Register 0x18, which are shown in the Register Maps and Bit Descriptions section. This address sharing enables all four DDS channels to be written to simultaneously. For example, if a common frequency tuning word is desired for all four channels, it can be written once through the serial I/O port to all four channels. This is the default mode of operation (all channels enabled). To enable each channel to be independent, the four channel enable bits found in the channel select register (CSR, Register 0x00) must be used.
注意，所有的通道共享寄存器0x03到0x18，这在寄存器的地图和位描述部分说明了。此地址共享使所有四个DDS通道被同时写入。例如，如果一个共同的频率调谐字为所有四个通道共有的，它可以只用通过串行I/O口写入一次到所有四个通道。这是默认操作模式（所有通道使能）。为了使每个通道是独立的，必须使用四通道使能（选择）寄存器（CSR，寄存器0x00）。
There are effectively four sets or copies of addresses (Register 0x03 to Register 0x18) that the channel enable bits can access to provide channel independence. See the Descriptions for Control Registers section for further details of programming channels that are common to or independent from each other. To properly read back Register 0x03 to Register 0x18, the user must enable only one channel enable bit at a time.
通道使能位可以有效四组或复制地址（寄存器0x03寄存器0x18）以提供通道独立。见控制寄存器部分关于通道编程的进一步细节描述，共同的或相互独立的。正确读取寄存器0x03到寄存器0x18，用户必须一次仅启用一个通道使能位。
Serial operation of the AD9959 occurs at the register level, not the byte level; that is, the controller expects that all bytes contained in the register address are accessed. The SYNC_I/O function can be
used to abort an I/O operation, thereby allowing fewer than all bytes to be accessed. This feature can be used to program only a part of the addressed register. Note that only completed bytes are affected.
AD9959的串行操作发生在寄存器水平，不是字节级；即控制器认为所有字节，包含在寄存器地址内的，都被访问过了。SYNC_ I/O功能可以用来终止一个I/O操作，从而允许少于所有字节被访问。此特点可用于编辑地址寄存器的一部分。请注意，只有完成的字节受影响。
There are two phases to a serial communications cycle. Phase 1 is the instruction cycle, which writes the instruction byte into the AD9959. Each bit of the instruction byte is registered on each corresponding rising edge of SCLK. The instruction byte defines whether the upcoming data transfer is a write or read operation. The instruction byte contains the serial address of the address register.
串行通信周期有两个阶段。1期是指令周期，写指令字节到AD9959。指令字节的每一位都在每个对应的SCLK的上升写入寄存器。指令字节定义即将到来的数据传输是写或读操作。指令字节包含地址寄存器的串行地址。
Phase 2 of the I/O cycle consists of the actual data transfer (write/read) between the serial port controller and the serial port buffer. The number of bytes transferred during this phase of the communication cycle is a function of the register being accessed. The actual number of additional SCLK rising edges required for the data transfer and instruction byte depends on the number of bytes in the register and the serial I/O mode of operation.
I / O周期的第2阶段由串行口控制器和串行端口缓冲器之间实际的数据传输（写/读）组成。在此阶段通信周期内传送的字节数是被访问寄存器的函数。数据传输和指令字节要求的实际的额外的SCLK上升沿数量，取决于寄存器的字节数和串行I/O操作模式。
For example, when accessing Function Register 1 (FR1), which is three bytes wide, Phase 2 of the I/O cycle requires that three bytes be transferred. After transferring all data bytes per the instruction byte, the communication cycle is completed for that register.
例如，当访问功能寄存器1（FR1），三个字节宽，I/O周期阶段2要求三字节被转送。传输指令字节后的所有数据字节，完成该寄存器通信周期。
At the completion of a communication cycle, the AD9959 serial port controller expects the next set of rising SCLK edges to be the instruction byte for the next communication cycle. All data written to the AD9959 is registered on the rising edge of SCLK. Data is read on the falling edge of SCLK (see Figure 43 through Figure 49). The timing specifications for Figure 41 and Figure 42 are described in Table 25.
在一个通信周期完成时，AD9959系列端口控制器预计下一组SCLK上升沿是下一个通信周期的指令字节。写入AD9959的所有数据在SCLK的上升沿注册，数据在SCLK的下降沿读取（见图43到图49）。图41和图42的时序规范如表25所示。
图41 Setup and Hold Timing for the Serial I/O Port 串口设置和保持时间；
图42 Timing Diagram for Data Read for Serial I/O Port串行I/O口读数据的时序图；
Each set of communication cycles does not require an I/O update to be issued. The I/O update transfers data from the I/O port buffer to active registers. The I/O update can be sent for each communication cycle or can be sent when all serial operations are complete. However, data is not active until an I/O update is sent, with the exception of the channel enable bits in the channel select register (CSR). These bits do not require an I/O update to be enabled.
每一组通信周期不需要发出I/O更新。I/O更新传输数据从I/O端口缓冲器到主动寄存器。可以为每个通信周期发送I/O更新，或者当所有串行操作完成时都可以发送。然而，数据是不活跃的，直到一个I / O更新发送，在通道选择寄存器（CSR）的通道使能位例外。这些位不需要I/O更新以使能。
INSTRUCTION BYTE DESCRIPTION指令字描述
The instruction byte contains the following information:
指令字包含下列信息：
Bit D7 of the instruction byte (R/W) determines whether a read or write data transfer occurs after the instruction byte write. A logic high indicates a read operation. A logic low indicates a write operation
该指令字节位D7（R / W）决定发生在指令字节写入后的数据传输是读或写入。逻辑高表示读操作。逻辑低指示写操作。
Bit D4 to Bit D0 of the instruction byte determine which register is accessed during the data transfer portion of the communication cycle. The internal byte addresses are generated by the AD9959.
位D4到位D0的指令字节确定哪一个寄存器是通信周期数据传送部分期间要访问的。内部字节地址由AD9959生成。
SERIAL I/O PORT PIN DESCRIPTION串口引脚描述
Serial Data Clock (SCLK)串行数据时钟
The serial data clock pin is used to synchronize data to and from the internal state machines of the AD9959. The maximum SCLK toggle frequency is 200 MHz.
串行数据的时钟引脚用于与AD9959内部状态机同步数据。最大时钟频率为200 MHz。
Chip Select (CS)片选
The chip select pin allows more than one AD9959 device to be on the same set of serial communications lines. The chip select is an active low enable pin. SDIO_x inputs go to a high
impedance state when CS is high. If CS is driven high during any communication cycle, that cycle is suspended until CS is reactivated low. The CS pin can be tied low in systems that maintain control of SCLK.
片选引脚允许一个以上的AD9959器件共用在同一组串行通信线路上。芯片选择是低电平有效的使能引脚。当CS为高，sdio_x输入呈现高阻抗。如果CS在任何通信周期驱动至高，该周期被暂停，直到CS低。CS引脚可接系统低电平，维持SCLK控制。
Serial Data I/O (SDIO_0, SDIO_1, SDIO_3)串口数据
Of the four SDIO pins, only the SDIO_0 pin is a dedicated SDIO pin. SDIO_1, SDIO_2, and SDIO_3 can also be used to ramp up/ramp down the output amplitude. Bits[2:1] in the channel select register (CSR, Register 0x00) control the configuration of these pins. See the Serial I/O Modes of Operation for more information.
这四个SDIO引脚，只有sdio_0引脚是一个专门的SDIO引脚。sdio_1，sdio_2，和sdio_3也可以用来加速/减速输出幅度。位[ 2:1 ]在通道选择寄存器（CSR，寄存器0x00）控制这些引脚的配置。查看串行I/O操作模式以获取更多信息。
SERIAL I/O PORT FUNCTION DESCRIPTION串口功能描述
Serial Data Out (SDO)串行数据输出
The SDO function is available in single-bit (3-wire) mode only. In SDO mode, data is read from the SDIO_2 pin for protocols that use separate lines for transmitting and receiving data (see Table 26 for pin configuration options). Bits[2:1] in the channel select register (CSR, Register 0x00) control the configuration of this pin. The SDO function is not available in 2-bit or 4-bit serial I/O modes. SDO的功能仅在单位（3线）模式有效。在SDO模式，数据是从sdio_2引脚读取，因为协议使用单独的线路发送和接收数据的（见引脚配置选项表26）。位[ 2:1 ]在通道选择寄存器（CSR，寄存器0x00）控制这个引脚配置。在2位或4位串行I/O模式的SDO功能不可用。
SYNC_I/O 同步
The SYNC_I/O function is available in 1-bit and 2-bit modes. SDIO_3 serves as the SYNC_I/O pin when this function is active. Bits CSR[2:1] control the configuration of this pin. Otherwise, the SYNC_I/O function is used to synchronize the I/O port state machines without affecting the addressable register contents. An active high input on the SYNC_I/O (SDIO_3) pin causes the current communication cycle to abort. After SDIO_3 returns low (Logic 0), another communication cycle can begin, starting with the instruction byte write. The SYNC_I/O function is not available in 4-bit serial I/O mode.
sync_ I/O功能可在1位和2位模式使用。当此功能激活时sdio_3作为sync_I/O引脚。位CSR [ 2:1 ]控制此引脚的配置。另外，该sync_ I/O功能用来同步I/O端口状态机不影响寻址寄存器内容。在sync_I/O（sdio_3）输入高电平导致当前通信周期中止。在sdio_3回到低（逻辑0），另一个通信周期的开始，从指令字节写启动。4位串行I/O模式下sync_ I/O功能不可用。
MSB/LSB TRANSFER DESCRIPTION 高低位传送描述
The AD9959 serial port can support both most significant bit (MSB) first or least significant bit (LSB) first data formats. This functionality is controlled by CSR[0]. MSB first is the default mode. When CSR[0] is set high, the AD9959 serial port is in LSB first format. The instruction byte must be written in the format indicated by CSR[0], that is, if the AD9959 is in LSB first mode, the instruction
byte must be written from LSB to MSB. If the AD9959 is in MSB first mode (default), the instruction byte must be written from MSB to LSB.
AD9959的串行端口可以支持最高位（MSB）先发或最低有效位（LSB）先发的数据格式。这个功能是由CSR[ 0 ]控制。MSB先发是缺省模式。当CSR[ 0 ]设置高，AD9959的串口在LSB 先发模式。指令字节必须写入CSR[ 0 ]格式，如果AD9959在LSB先发模式，指令字节必须从LSB到MSB写入。如果AD9959是在MSB先发模式（缺省），指令字节必须写从MSB到LSB 入。
Example Operation操作例程
To write Function Register 1 (FR1, Register 0x01) in MSB first format, apply an instruction byte of 00000001 starting with the MSB (in the following example instruction byte, the MSB is D7). From this instruction, the internal controller recognizes a write transfer of three bytes starting with the MSB, FR1[23]. Bytes are written on each consecutive rising SCLK edge until Bit 0 is transferred. When the last data bit is written, the I/O communication cycle is complete and the next byte is considered an instruction byte.
写入功能寄存器1（FR1，寄存器0x01）在MSB先发模式，指令字节00000001，从MSB开始（在下面的例子中的指令字节，MSB是D7）。从这个指令，内部控制器识别要写入三个字节，从MSB，FR1 [ 23 ]开始。字节写入在每个连续的SCLK上升沿，直到位0传送完成。当最后一个数据位被写入时，I/O通信周期完成，下一个字节被认为是一个指令字节。
To write Function Register 1 (FR1) in LSB first format, apply an instruction byte of 00000001, starting with the LSB bit (in the preceding example instruction byte, the LSB is D0). From this instruction, the internal controller recognizes a write transfer of three bytes, starting with the LSB, FR1[0]. Bytes are written on each consecutive rising SCLK edge until Bit 23 is transferred. When the last data bit is written, the I/O communication cycle is complete and the next byte is considered an instruction byte.
写入功能寄存器1（FR1）在LSB先发模式，应用指令字节0000000 1，从最低位（在前面的示例指令字节，LSB是D0）。从这个指令，内部控制器识别写传输三字节，从LSB，FR1 [ 0 ]。字节开始。字节写入在每个连续的SCLK上升沿，直到位23传送完成。当最后一个数据位被写入时，I/O通信周期完成，下一个字节被认为是一个指令字节。
SERIAL I/O MODES OF OPERATION串口操作模式
The following are the four programmable modes of serial I/O port operation:
?Single-bit serial 2-wire mode (default mode)
?Single-bit serial 3-wire mode
?2-bit serial mode
?4-bit serial mode (SYNC_I/O not available)
以下是串行I/O的四种可编程模式：
?单位串行2线模式（缺省模式）
?单位串行3线模式
?2位串行模式
?4位串行模式（sync_I/O不可用）
Table 26 displays the function of all six serial I/O interface pins, depending on the mode of serial I/O operation programmed.
表26显示所有六个串行I/O接口引脚的功能，根据串行I/O操作模式编程。
注：在串行方式，引脚（SDIO _ 0 / SDIO _1 / SDIO_ 2 / SDIO_ 3）可以用于的RU/ RD操作。The two bits in the channel select register, CSR[2:1], set the serial I/O mode of operation and are defined in Table 27.
在通道选择寄存器的两个数据位，CSR [ 2:1 ]，设置串行I / O操作模式，在表27中定义。
Single-Bit Serial (2-Wire and 3-Wire) Modes单位串行模式（2线和3线）
The single-bit serial mode interface allows read/write access to all registers that configure the AD9959. MSB first or LSB first transfer formats are supported. In addition, the single-bit serial mode interface port can be configured either as a single pin I/O, which allows a 2-wire interface, or as two unidirectional pins for input/output, which enable a 3-wire interface. Single-bit mode allows the use of the SYNC_I/O function.
单位串行模式接口允许读写访问所有的寄存器来配置AD9959。支持传输MSB优先或LSB优先模式。此外，单位串行模式接口端口可以配置为一个单I / O引脚，它允许一个2线接口，或输入/输出两个单向引脚，使用3线接口。单位模式允许sync_I/O功能的使用。
In single-bit serial mode, 2-wire interface operation, the SDIO_0 pin is the single serial data I/O pin. In single-bit serial mode 3-wire interface operation, the SDIO_0 pin is the serial data input pin and the SDIO_2 pin is the output data pin. Regardless of the number of wires used in the interface, the SDIO_3 pin is configured as an input and operates as the SYNC_I/O pin in the single-bit serial mode and 2-bit serial mode. The SDIO_1 pin is unused in this mode (see Table 26).
在单位串行模式下，2线接口操作，sdio_0引脚是一个串行数据的I/O引脚。单位串行3线接口的操作模式，sdio_0引脚是串行数据输入引脚，sdio_2引脚是输出数据引脚。无论在接口中使用的线数，sdio_3引脚配置为输入，作为sync_I/O引脚，在单位串行模式和2位串行模式。在这种模式中，sdio_1引脚未使用（见表26）
2-Bit Serial Mode2位串行模式
The SPI port operation in 2-bit serial mode is identical to the SPI port operation in single-bit serial mode, except that two bits of data are registered on each rising edge of SCLK. Therefore, it only takes four clock cycles to transfer eight bits of information. The SDIO_0 pin contains the even numbered data bits using the notation D[7:0], and the SDIO_1 pin contains the odd numbered data bits. This even and odd numbered pin/data alignment is valid in both MSB and LSB first formats (see Figure 44).
SPI端口的操作在2位串行模式下与在单位串行模式下是相同的，除了有两位数据在每个SCLK 的上升沿注册。因此，只需要四个时钟周期就可以传输八比特的信息。使用符号D [7:0]，sdio_0引脚包含偶数数据位，sdio_1引脚包含奇数数据位。奇数引脚/数据对齐在MSB和LSB先发模式是有效的（参见图44）。
4-Bit Serial Mode 4位串行模式
The SPI port in 4-bit serial mode is identical to the SPI port in single-bit serial mode, except that four bits of data are registered on each rising edge of SCLK. Therefore, it takes only two clock cycles to transfer eight bits of information. The SDIO_0 and SDIO_2 pins contain even numbered data bits using the notation D[7:0], and the SDIO_0 pin contains the LSB of the nibble. The SDIO_1 and SDIO_3 pins contain the odd numbered data bits, and the SDIO_1 pin contains the LSB of the nibble to be accessed.
SPI端口4位串行模式与单位串行模式相同，除了四位的数据在每个SCLK的上升沿注册。因此，只需要两个时钟周期就可以传输八比特的信息。使用符号D [7:0]，sdio_0和sdio_2包含偶数数据位，sdio_0引脚包含片断的LSB。sdio_1和sdio_3包含奇数数据位，sdio_1引脚包含被访问的该片断的LSB。
Note that when programming the device for 4-bit serial mode, it is important to keep the SDIO_3 pin at Logic 0 until the device is programmed out of the single-bit serial mode. Failure to do so can result in the serial I/O port controller being out of sequence. Figure 43 through Figure 45 represent write timing diagrams for each of the serial I/O modes available. Both MSB and LSB first modes are shown. LSB first bits are shown in parentheses. The clock stall low/high feature shown is not required. It is used to show that data (SDIO) must have the proper setup time relative to the rising edge of SCLK.
注意，当编程用于4位串行模式，保持sdio_3引脚为逻辑0很重要，直到器件已经编程出了单位串行模式。未能这样做会导致串行I/O端口控制器出现故障。图43通过图45提供了对于每一个串行I / O模式可用的写时序图。MSB和LSB先发模式都展示了。LSB的第一位显示在括号中。时钟延展于低/高特点展示不是必需的。它是用来显示数据（SDIO）相对于SCLK 的上升沿必须有合适的设定时间。
Figure 46 through Figure 49 represent read timing diagrams for each of the serial I/O modes available. Both MSB and LSB first modes are shown. LSB first bits are shown in parentheses. The clock stall low/high feature shown is not required. It is used to show that data (SDIO) must have the proper setup time relative to the rising edge of SCLK for the instruction byte and the read data that follows the falling edge of SCLK.
图46到图49表示每个串行I/O模式可用读取时序图。MSB和LSB先发模式都有。LSB的第一位显示在括号中。时钟延展于低/高特点展示不是必需的。它是用来显示对于指令，数据（SDIO）相对于SCLK的上升沿，读数据相对于SCLK的下降沿，必须有合适的设定时间。
REGISTER MAPS AND BIT DESCRIPTIONS寄存器表和位描述REGISTER MAPS 寄存器表
Unit1 Section A 公交司机和乘客一起救护老人 昨天上午9点钟，当26路公交车在中华路行驶的途中，司机看到一位老人正躺在路中，一位妇女正在老人身边大声呼救。 这位24岁的公交司机王平，没有丝毫的犹豫就停下了车。他从车上下来，询问那位妇女发生了什么事。她说这位老人有心脏病，需要送往医院。王先生知道他必须马上行动起来。他告诉（车上的）乘客他必须送老人去医院。他希望大多数或者全部乘客下车等下一班车。但令他惊讶的是，所有的乘客都同意和他一起去（医院）。部分乘客帮助王先生把老人搬到车上。 多亏了王先生和乘客们，医生们及时挽救了那位老人。一位乘客说：“许多人不想帮助别人是令人痛心的，因为他们不想惹上麻烦。但是这位公交车司机没有考虑自己，他只考虑去救人。” SectionB 他失去了胳膊但是仍然登山 阿伦罗尔斯顿是一位对登山感兴趣的美国人。作为一名登山者，阿伦习惯于冒险。这是他做的刺激的危险运动之一。有好多次因为事故，阿伦险些丢掉性命。在2003年的4月26日，当他在尤他州登山的时候，他发现自己陷入了非常危险的境地。 在那一天，当阿伦独自在山里登山时，他的胳膊被一块2000千克的石头压在了下面。因为他的胳膊拿不出来，所以他在那里困了五天，希望有人能够发现他。但是当他的水喝光以后，他知道他将不得不做点事情来挽救自己的生命。那时他还不准备死。所以他用刀子切除了自己一半的右臂。然后，用左胳膊对自己进行了包扎，以至于不会失血过多。完成这些以后，他爬下山，寻求帮助。 失去胳膊以后，他写了一本书《在顽石与绝境之间》。这就意味着你在一个艰难的似乎无法走出的境地中。在这本书中，阿伦讲述了做正确决定的重要性，以及掌握命运的重要性。他对登山的挚爱如此的强烈以至于经过这次经历后，他仍然继续登山。 我们有和阿伦一样的勇气吗？让我们在发现自己处在一个“顽石与绝地间”的境地前考虑一下，在我们不得不做出生与死的选择前考虑一下。 Unit2 SectionA 学生志愿者 来自河畔高中的马里奥格林和玛丽布朗每周拿出几小时去帮忙朋友。 马里奥喜欢动物，想成为一名兽医。每周六的上午，他在一家动物医院做义工。马里奥相信通过做义工能够帮助他得到将来梦想的工作。他说：“做义工是一项艰苦的工作，但是我想了解更多关于如何照顾动物的知识。当我看到动物们变得健康以及它们的主人脸上的快乐表情时，我就有一种强烈的满足感。” 玛丽是一位读书爱好者。在她四岁的时候，就能够自己读书。去年，她决定尝试做一个课后读书活动的志愿者。她仍然在那里一周一次帮助儿童们学习读书。“儿童们坐在图书馆里，但是你能在他们眼睛里看到，通过每一本新书，他们正在踏上不同的旅途。在这里做义工，对我来说实现了梦想。我能做我喜欢做的事情并且同时可以帮助比尔呢。”
M1U2Home alone Act One Mom and Dad arrive back from vacation a day earlier than expected. The curtains are closed and the living room is dark when Mom and Dad enter. Dad: It’s so nice to be home! Mom: Yes, I can’t wait to surprise the boys! Suddenly the door opens and a soccer ball flies through the room. Eric runs in after it, followed by a big dog, walking very slowly. Eric: Mom! Dad! You’re back early! (looking around room, sounding frightened) But, but … you weren’t supposed to come home until tomorrow! The dog slowly walks to Mom and Dad. Mom: (bending to touch dog) Eric, he’s so tired and hungry! (looking at table) The money for dog food is gone, but Spot looks like he is starving! What did you do with the cash we left? Dad: And look at this room—garbage all over the place! Where is your brother? (shouting angrily) Daniel! Daniel: (running into room) Mom, Dad, I can explain … Dad opens the curtains and light comes into the room. The room is in a mess, with pizza boxes on the floor and dirty dishes in the sink. In the corner, there is a garbage can around which are pieces of garbage and waste paper. Mom and Dad both turn towards Daniel. Dad: (sounding very angry) Listen to me, young man—we left you in charge! We thought you could act like an adult, but look at the mess! I don’t know why the house is so dirty ... Mom: Daniel, we thought you were an adult, a person who would make good decisions ... Dad: How can we trust you any mo re? We won’t tolerate such behavior in our house! Daniel: (shouting) Stop shouting at me. I’m still a teenager! Why is everything always my fault? Daniel runs into his bedroom and shuts the door angrily. Mom and Dad look at each other as lights go out. End of Act One Act Two, Scene One Daniel and Eric’s bedroom. Eric sits on his bed. Daniel has his arms crossed and looks upset. Daniel: They never even gave me a chance to defend myself. I hate them! Eric: You don’t h ate them. I can tell them we had an emergency. Then they won’t be mad any more. Daniel: No, don’t tell them anything. Anyhow, they didn’t trust me. They don’t deserve an explanation. Let them think what they want. Eric: But Daniel, if they knew that Spot was sick and we used the money to take him to the clinic ... Daniel: And that we spent all of yesterday waiting there for him, and that is why we had no time to clean the house ... but no, Eric, why didn’t they ask me what happened instead of shouting at me? Act Two, Scene Two
四年级下学期英语课文中文翻译 Lesson 1: Sara：你喜欢音乐吗，阳阳？ 阳阳：是的，我喜欢。我非常喜欢音乐。我听各种各样的音乐。但我最喜欢流行歌曲。 Sara：我也喜欢流行歌曲。但我最喜欢高雅音乐。我会钢琴。 阳阳：我会小提琴。有时间我们一起玩。 Lesson 2： 果果：你养宠物吗，玲玲？ 玲玲：不，我不养。但我喜欢猫。猫都很安静。猫也很可爱。 果果：我喜欢狗。狗是我们的好朋友。狗对我们帮助很大。 玲玲：是的。但狗太吵了。狗见了陌生人会叫。 Lesson 3： 爸爸：放学后你喜欢做什么，麦克？ 麦克：我喜欢做飞机模型。 爸爸：将来你想做什么? 麦克：我长大后想开真飞机。有朝一日我想飞到月球和火星。 爸爸：那也就是说你想当宇航员。你真棒！ Lesson 5： 妈妈：你怎么了，宝宝？ 宝宝：我觉得不舒服。我头很疼，妈妈。 妈妈：恐怕你是病了。你需要去看病。 宝宝：今天我不能上学了，太糟糕了。 Lesson 6： 宝宝：医生，我觉得不舒服。我头疼得厉害。 医生：唉！你发高烧了。张开嘴说“啊---”。 宝宝：你需要给我验血吗？ 医生：恐怕需要。你得了流感。这种药每天吃三次。你很快就会康复的。Lesson 7： 医生：你怎么了？ 麦克：我的右腿伤得很严重，医生。 医生：我来看看。哪疼啊？ 麦克：膝盖附近疼。 医生：恐怕我们需要拍一个X光片。
Lesson 9： 麦克：对不起，你能告诉我去图书馆的路吗？ 男人：哦，好的。就在那栋棕色楼的五层。 麦克：是在楼梯的右边还是左边呢？ 男人：在右边的第三个房间。 麦克：太谢谢你了。 男人；我很乐意。 Lesson 10： 女人：对不起。我正在找医院。我怎么才能到那呢？ 毛毛：就在附近。你看到那座有一个白色十字的灰色大楼了吗？ 女人：看到了。在那座红色大楼的右边。 毛毛：我正好顺路。我带你去吧。 女人：你太好了。真谢谢你。 毛毛：不客气。 Lesson 11： 女人：对不起，请问车站在哪啊？远吗？ 果果：不远。继续往前开车然后左转。你会在你的右边看见一个标志。 女人：我看到了。我应该先往前开然后左转。我会在我的右边看见一个标志。果果：是的。那个标志是红色和黄色的。你一定能看见。 女人：多谢。祝你一天过得愉快。 果果：你也是。 Lesson 15： 果果：五一就要到了。我们也叫它劳动节。在五月一日。 Sara：但是在美国劳动节是在九月的第一个星期一。 果果：在中国，劳动节是一个劳动人民的节日。那天你要干什么？ Sara：我们要去参观长城。 Lesson 16： 玲玲：儿童节就要到了。在六月一号。 麦克：儿童节你干什么？ 玲玲：全国的孩子们都庆祝这个节日。在那一天我们去电影院，公园，和博物馆。我们也会收到父母送的礼物。 麦克：我们学校每年都举办聚会吗？ 玲玲：是的。你们肯定会过得很愉快的。 Lesson 17：
Directorate-General for Translation European Commission
HOW TO WRITE CLEARLY This booklet is intended for all writers of English at the European Commission. Whether your job is drafting or translating, here are some hints – not rules – that will help you to write clearly and make sure your message ends up in your readers’ brains, not in their bins. Put the reader first page 2 Use verbs, not nouns page 3 page 4 abstract not Concrete, passive 5 page not Active, Whodunnit? Name the agent page 6 Making sense – managing stress page 7 KISS: Keep It Short…. page 8 page Simple 9 … and False friends … page 10 pitfalls page 11 other and … References page 12
Put the reader first There are three groups of people likely to read Commission documents: 1. EU insiders (colleagues in the Commission or other institutions) 2. outside specialists 3. the general public. The third group is by far the largest and most important. As more Commission documents are made accessible to the general public, criticism of FOG will increase. Always bear in mind the people you're writing for: not your committee, your boss, or the reviser of your translations, but the end users. They are in a hurry. Don't overestimate their knowledge, interest or patience. Whatever the type of document - legislation, a technical report, minutes, a press release or speech - you can enhance its impact by writing clearly. Try to see your subject matter from your readers' point of view; try to involve them ("you" is an under-used word in Commission documents); and try not to bore them. You can avoid irritating half your readers by replacing gender-specific words (replace "layman" by "lay person"; "salesgirl" by "sales assistant"; "workman" by "worker"). Avoid "he, she/ his, her" by using "they/ their" instead.
人教版七年级上册英语课文翻译 P4 Daming and I’ｍin Class One. I’ｍfrom China and I’ｍChinese. I’ｍfrom Beiji My name’ｓ my friend. ng. Beijing is a big city. Lingling’ｓ in my class. She’ｓ Lingling. I’ｍnot from England and I’ｍnot English. I’ｍChinese. I’ｍin Class O My name’ｓ in my class. W from Beijing and he’ｓ ne. Daming is my friend. We’re twelve years old. He’ｓ e’re good friends. Wang Hui and I’ｍChinese. I’ｍfrom Shanghai. I’ｍthirteen years old. I’ｍin Cl My name’ｓ ass One with Daming and Lingling. They are my friends. 我的名字叫大明，和我在一班。我来自中国，和我是中国人。我来自北京。北京是个大城市。 玲玲在我的班。她是我的朋友。 我的名字叫玲玲。我不是来自英国，和我也不是英国人。我是中国人。我在一班。大明是我 的朋友。我们12岁了。他来自北京，和他在我的班。我们是好朋友。 我的名字叫王辉，和我是中国人。我不是来自北京。我来自上海。我13岁了。我在一班和大明、玲玲。他们是我的朋友。 P8 Miss Li: Please welcome Betty and Tony to our school. They are from Beijing International School. This is Betty. Betty. I’ｍfrom America. I’ｍ13 years old and I’ｍ a student. I ca Betty: Hello. My name’ｓ speak Chinese. Th n play football and I can play basketball. I can speak English but I can’ｔ my friend. is is Tony. He’ｓ Tony. I’ｍ11 years old. I’ｍfrom England and I can speak English Tony: Hello. My name’ｓ . I can play football and table tennis, and I can ride a bike. Lingling: Can you swim? speak Chinese! Tony: No, I can’t. And I can’ｔ 李小姐：请欢迎贝蒂和托尼来我们学校。他们来自北京国际学校。这是贝蒂。 贝蒂：你好。我的名字叫贝蒂。我来自美国。我十三岁，和我是一个学生。我能踢足球，和 我能打篮球。我能说英语但是我不能说汉语。这是托尼。他是我的朋友 托尼：你好。我的名字叫托尼。我十一岁了。我来自英国，和我能说英语。我能踢足球和打 乒乓球，和我能骑一辆车。
人教版七年级上册英语课文中文翻译完整版 预习单元1—3 Starter Unit 1 Section A 1a 早上好，海伦！嗨，鲍勃！早上好，艾丽斯！喂，弗兰克！喂，埃里克！早上好，戴尔！ Section B 1 下午好，戴尔！嗨，辛蒂！你好吗？我很好，多谢。你好吗？我很好。 Self Check 1 嗨喂上午下午晚上好的好谢谢好的 4 年龄手他床Just for Fun 晚上好！ Starter Unit 2 Section A 1b 这用英语怎么说？一张地图。一个橙子。 Section B 1a 用英语说这是什么？一把钥匙。请拼一下。 Self Check 3夹克衫艾丽斯地图钥匙橙子戴尔海伦格雷斯辛蒂鲍勃钢笔弗兰克被子埃里克尺子 4 名字能他腿美好的牛奶去狗 Starter Unit 3 Section A 1a 这是什么？它是字母V。它是什么颜色的？它是红色的。这是什么？它是字母Z。它是黑白相间的。 Section B 1b 这把钥匙是黄色的。这把尺子是蓝色的。这支钢笔是红色的。Self Check 它是绿色的。 字母意思（铅笔芯）硬黑激光唱片英国广播公司停车（美国）全国篮球协会千克小号/中号/大号不明飞行物中央电视台联合国
一单元 Section A 1a 我是吉娜。见到你真高兴。 Grammer Foucs 你的名字是什么？我的名字是詹妮。我是詹妮。他的名字是什么？他的名字是托尼。她的名字是什么？她的名字是吉娜。 Section B 1c 你的电话号码是什么，李欣？是281-6926。 3b 她的电话号码是什么？她的姓氏是什么？她的名字是什么？ Self Check 1 我她是身份证什么我的喂你的他的她的名姓电话号码 Just for Fun你的名是什么？ZIG。你的姓是什么？ZAG。 二单元 Section A 1a 那是你的双肩背包吗？不，不是。它是他的双肩背包。这是你的铅笔吗？是的，它是。它是我的铅笔。这是你的尺子吗？不，不是。它是她的尺子。铅笔钢笔书橡皮擦尺子铅笔盒书包卷笔刀词典 2b 请原谅，索尼亚。这是你的铅笔吗？是的，谢谢。那是我的橡皮。简，这是你的尺子吗？不，不是。它是她的尺子。好的，这是我的书。这是你的铅笔盒，简。 Section B 1a 棒球手表电子游戏机身份证钥匙笔记本戒指钢笔 1b 这是什么？一块手表。你怎样拼写它？…… 3a 这是你的手表吗？给艾伦打电话495—3539。艾伦，失物招领箱中的电子游戏是你的吗？尼克招领：笔记本这是你的笔记本吗？请给玛丽打电话。电话#235—0285。寻物：我的学生证。我的名字是托尼。请打电话685
搜索代码：短语1分词2 不定式完成时 3 with结构 4 句型 5 M1U1 SCHOOL life in the UK Going to a British high school for one year was a very enjoyable and exciting experience for me. I was very happy with the school hours in Britain because school starts around 9 a.m. and ends about 3.30 p.m. This means I could get up an hour later than usual as schools in China begin before 8 a.m. On the first day, all of the new students attended an assembly in the school hall. I sat next to a girl whose name is Diane. We soon became best friends. During the assembly, the headmaster told us about the rules of the school. He also told us that the best way to earn respect was to devote oneself to study and achieve high grades. This sounded like my school in China. I had many teachers in the past year. Mr. Heywood , my class teacher, was very helpful. My favorite teacher was Miss Burke—I loved the lessons that she gave in English Literature. In our class there were 28 students. This is about the average size for British schools. We had to move to different classrooms for different classes. We also had different students in some classes, so it was a struggle for me to remember all the faces and names. I found the homework was not as heavy as what I used to get in my old school, but it was a bit challenging for me at firs t because all the homework was in English. I felt lucky as all my teachers gave me much encouragement and I enjoyed all my subjects: English, History, English Literature, Computer Science, Maths, Science, PE, Art, Cooking and French. My English improved a lot as I used English every day and spent an hour each day reading English books in the library.I usually went to the Computer Club during the lunch break, so I could send e-mails to my family and friends back home for free. I also had an extra French class on Tuesday evenings. Cooking was really fun as I learned how to buy, prepare and cook food. At the end of term we held a class party and we all had to cook something. I was glad that all my classmates were fond of the cake that I made. Students at that school have to study Maths, English and Science, but can stop studying some and French. They can choose other subjects subjects if they don’t like them, for example, History like Art and Computer Science or Languages such as Spanish and German. In the Art class that I very beautiful when it was finished, I still took, I made a small sculpture. Though it didn’t look liked it very much. I missed Chinese food a lot at lunch. British food is very different. British people like eating dessert at the end of their main meal. After lunch, we usually played on the school field. Sometimes I played football with the boys. Sometimes I just relaxed under a tree or sat on the grass. I was very lucky to experience this different way of life. I look back on my time in the UK with satisfaction, and I really hope to go back and study in Manchester again. 在英国的学校生活 在英国上了一年的中学对我来说是一段非常令人愉快和兴奋的经历。我很喜欢英国中学的作息时间，因为学校每天上午大约9点上课，下午大约3点半放学。这意味着我每天可以比以往 晚一个小时起床，因为在中国学校每天上午8点之前就开始上课了。
人教新版英语级上册课 文中文翻译 Document serial number【NL89WT-NY98YT-NC8CB-NNUUT-NUT108】
五年级英语课文 第一单元 第1课 1、刘老师：你们好，孩子们。我们班来了两个新朋友。鲍勃和周培， 到这儿来。到前面来。 2、鲍勃：大家好！我是鲍勃。我11岁。我来自英国。 3、周：上午好！我是周培。我10岁了。我来自北京。 4、同学们：欢迎来到我们班！ 5、两人：谢谢你们！ 6、刘老师：鲍勃和周培，请你们回到座位。现在，让我们开始上课 吧。
第2课 1、我是鲍勃。我11岁。我来自英国。 2、我是本，10岁。来自英国。 3、贝蒂，11岁，来自澳大利亚。 4、比尔，12岁，来自新西兰 5、
1、周：你好，我叫周培。你叫什么名字？ 2、 3、帕特里克：我叫格林。帕特里克。 4、周：你在哪班？ 5、帕特里克：我再五年三班。你呢？ 6、周：我再五年一班。 7、帕特里克：哦，我们在同一年级。让我们成为朋友吧。 8、周：好的！你住哪？ 9、帕特里克：我住在格林路。 10、周：格林路你家门牌号是多少 11、 12、帕特里克：23号。你呢？ 13、周：噢，我们住在紫色大街46号。 14、帕特里克：噢，我们彼此住的很近！让我们一起回家吧。 13、周：好的。我们走吧！
1、你叫什么名字？ 2、我叫周培。 3、你在几班？ 4、我在五年一班。 5、你住哪儿？ 6、我住在格林路。 7、我住在紫色大街46号。 8、我叫鲍勃。 9、我在五年一班。 10、我住格林路34号 11、我叫琳达。 12、我在五年二班。 13、我住苹果大街48号。 14、你呢？
必修二Module 1 Zhou Kai (1) 周凯（1） 周凯的妈妈看到他没有穿夹克衫就往前门走去时，她担心地盯着周凯，问道 "周凯，上哪儿去呀" "去公园踢球，"周凯说。 "下着雨呢!会得重感冒的，"妈妈说。 "不会的，没事，"周凯边说边开门。 "周凯，你会生病的，肯定会的。你至少可以去拿上你的夹克衫。 "好吧，好吧，"周凯听话地带了件夹克，走了出去。 Zhou Kai (2) 周凯（2） 我妈妈总是想方设法让我们吃得健康，新鲜水果和蔬菜是我们食谱中很重要的一部分。我们家靠近大海，一周吃四次鱼。脂肪和糖分的摄取不是很多。学校里很多同学每天都吃:甜食，我很幸运我不喜好甜食,我宁愿吃一块 (一片)美味的水果。我不是很胖，所以;我不必节食，也不必做其他类似的事情。 我很健康。很少感冒。不过很少见的是上周得了重感冒还有点发烧。但那是因为我真是够蠢的，居然在雨中踢足球。我也不常染上流感。去年冬天全班同学儿乎都得了流感---我却幸免了。我认为我不会得这些病，因为我经常锻炼，很健康。两年前我在踢球时胳膊骨折了。伤口疼得厉害，胳膊一个月不能动，太讨厌了。 从我上面的话你可以看出，我是个普通的人。不过有一件事我非常喜爱-----我对足球太着迷了。我是班上足球队的队长，也是高中球队的球员。正因为如此，我确保自己的合理膳食，我早就说过，这没问题，妈妈照顾我们吃得真是太好了。
必修二Module 2 Article 1文章一 我叫亚当?鲁斯，19岁。我曾经是个瘾君子， 15岁时我开始尝试毒品。我从街上一个男人手中购买大麻，大约有六个月我一直从这个人手里买大麻。一天他给了我一些纯可卡因。 Article 2文章二 可卡因是一种极容易使人上瘾的毒品。有些毒品使用者注射可卡因，有些则吸人体内。两种途径都很危险。如果那些注射毒品的人和其他吸毒者共用针头的话，他们会面临更多危险。 1. 强效纯可卡因是最能让人上瘾的一种可卡因。毒品使用者如果直接吸入体内的话会更容易上瘾。吸入的方式可以让可卡因很快进入大脑。 2. 当我回到那个男人那儿的时候，我向他要更多的强效纯可卡因。他向我要很多的钱。我的钱不够，所以他就再也不给我毒品了。我痛苦得要命。 3. 第二天我闯进一户人家，偷了一台电视机和一台录像机。我把它们带给那个贩毒的人。他让我把这些东西送到附近一条街的一家商店。店里的人给了我一些钱。我把钱给了贩毒者，他又给了我一些强效纯可卡因。 4.使用可卡因能够加快心脏速率、增高血压。所以可卡因吸毒者常患心脏病。吸食强效纯可卡因也会导致引起反社会的行为。 5. 到此时我己经对强效纯可卡因上了瘾。要是我不使用，就会难受极了。我不得不每天行窃以购买毒品。终于有一天我被带到了警察局。 6. 第二天，一位医生来看我。他告诉我要是不停止吸食强效纯可卡因就有可能会死去的，我听取了医生的劝告，立刻停了。现在我在一所戒毒中心工作，帮助其他人戒毒。
汉译英 翻译的定义 翻译是指把一种语言文字 的意义转换成另一种语言 文字。简言之，翻译是一 种用不同的语言文字将原 文作者的意思准确地再现 出来的艺术。从以上翻译 定义我们知道，原文的思 想必须尽可能得到保持， 不可有所增删。译者的任 务只是转换文字而不是改 变其意思。因此，翻译有 两种要素：准确性与表达性。准确性是翻译的首要 条件。译者必须谨慎地遵 循原作者的意思，所选用 的字词和句式结构必须如 实地传达出原文的思想。 表达性是让译文易于理解。换言之，译者必须用自己 的手段尽可能地将原文的 思想清楚而有力地表达出来。准确性使译出的思想 明确无误，而表达性则使 译文生动，具有魅力。Definition of Translation Translation means the conversion of an expression from one language into another. To say it plainly, translation is an art to reproduce the exact idea of the author by means of a language different from the original. From the above definition of translation we know that the original thought of the expression must be kept as far as possible. Nothing should be added to or taken away from the original work. The duty of the translator is simply to change the vocabulary, not the thought. In translation therefore, there are two essential elements: accuracy and expressiveness. Accuracy is the first indispensable quality of translation. The translator must cautiously stick to the author’s idea. Words selected and sentences constructed must be such as to convey the exact original thought. Expressiveness is to make the translation readily understood. In other words, the translator must express the author’s idea as clearly and as forcibly as he can by the medium he employs. Accuracy is to make the thought definite and exact; while expressiveness is to make the translation vivid and attractive.
M1U1 SCHOOL life in the UK Going to a British high school for one year was a very enjoyable and exciting experience for me. I was very happy with the school hours in Britain because school starts around 9 a.m. and ends about 3.30 p.m. This means I could get up an hour later than usual as schools in China begin before 8 a.m. On the first day, all of the new students attended an assembly in the school hall. I sat next to a girl whose name is Diane. We soon became best friends. During the assembly, the headmaster told us about the rules of the school. He also told us that the best way to earn respect was to devote oneself to study and achieve high grades. This sounded like my school in China. I had many teachers in the past year. Mr. Heywood , my class teacher, was very helpful. My favorite teacher was Miss Burke—I loved the lessons that she gave in English Literature. In our class there were 28 students. This is about the average size for British schools. We had to move to different classrooms for different classes. We also had different students in some classes, so it was a struggle for me to remember all the faces and names. I found the homework was not as heavy as what I used to get in my old school, but it was a bit challenging for me at firs t because all the homework was in English. I felt lucky as all my teachers gave me much encouragement and I enjoyed all my subjects: English, History, English Literature, Computer Science, Maths, Science, PE, Art, Cooking and French.
Part One Manuscript Form As you are learning to write, you should have a clear idea of what is good manuscript form. You should do everything - writing the title, leaving margins, indenting, capitalizing, and dividing words - according to generally accepted rules. Whenever you write something, work carefully, write neatly and clearly, and try to make as few mistakes as possible. Before handing in your essay or exercise, proofread it once or twice, because you may need to make some final corrections and changes. Ⅰ. Arrangement排版 Leave a margin on each side of the paper - about two centimeters at the top and a centimeter and a half at the left, the right and the bottom. In an exercise book the top and bottom margins are already there, so you need only to draw a vertical line to mark the left margin. You cannot make the right margin very straight, but you must not write to the edge of the paper. When there is not enough space left for a word, write it on the next line if it cannot be divided. In other words, there must be some blank space on the right side of the paper. Write the title in the middle of the first line. Capitalize the first and last words of the title and all other words(including words following hyphens in compound words) except articles冠词, coordinating conjunctions并列连词(and, or, but, nor, for), prepositions介词, and the to in infinitives不定式。 No period is used at the end of a title. Use a question mark if the title is a direct question, but do not use one if it is an indirect question. Use quotation marks with quotes or titles of articles; and underline names of books. Indent缩写the first line of every paragraph, leaving a space of about four or five letters. Do not begin a line with a comma, a period, a semicolon, a colon, a question mark or an exclamation mark. Do not end a line with the first half of a pair of brackets, quotation marks, or parentheses. The hyphen that indicates a divided word is put at the end, not at the beginning, of a line. Ⅱ. Word Division移行 When you write near the edge of the paper, take a look at the space left. If it is not enough for the word you are going to write, you have to decide whether to divide the word or to write it on the next line. Never squeeze a word into the margin. The general principle is to divide a word according to its syllables. Pay attention