毕业设计（论文）外文原文及译文
一、外文原文
MCU
A microcontroller (or MCU) is a computer-on-a-chip. It is a type of microcontroller emphasizing self-sufficiency and cost-effectiveness, in contrast to a general-purpose microprocessor (the kind used in a PC).
With the development of technology and control systems in a wide range of applications, as well as equipment to small and intelligent development, as one of the single-chip high-tech for its small size, powerful, low cost, and other advantages of the use of flexible, show a strong vitality. It is generally better compared to the integrated circuit of anti-interference ability, the environmental temperature and humidity have better adaptability, can be stable under the conditions in the industrial. And single-chip widely used in a variety of instruments and meters, so that intelligent instrumentation and improves their measurement speed and measurement accuracy, to strengthen control functions. In short，with the advent of the information age, traditional single- chip inherent structural weaknesses, so that it show a lot of drawbacks. The speed, scale, performance indicators, such as users increasingly difficult to meet the needs of the development of single-chip chipset, upgrades are faced with new challenges.
The Description of AT89S52
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of In-System Programmable Flash memory. The device is manufactured using Atmel's high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.
The AT89S52 provides the following standard features: 8K bytes of
Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.
Features
? Compatible with MCS-51? Products
? 8K Bytes of In-System Programmable (ISP) Flash Memory
– Endurance: 1000 Write/Erase Cycles
? 4.0V to 5.5V Operating Range
? Fully Static Operation: 0 Hz to 33 MHz
? Three-level Program Memory Lock
? 256 x 8-bit Internal RAM
? 32 Programmable I/O Lines
? Three 16-bit Timer/Counters
? Eight Interrupt Sources
? Full Duplex UART Serial Channel
? Low-power Idle and Power-down Modes
? Interrupt Recovery from Power-down Mode
? Watchdog Timer
? Dual Data Pointer
? Power-off Flag
Pin Description
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.
Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups.
Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.
Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively.
Port 1 also receives the low-order address bytes during Flash programming and verification.
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.
Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.
Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.
Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.
Port 3 also receives some control signals for Flash programming and verification.
RST
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.
ALE/PROG
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.
In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN
is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions.
This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Special Function Registers
Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0.
Timer 2 Registers:Control and status bits are contained in registers T2CON and T2MOD for Timer 2. The register pair (RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Interrupt Registers:The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the six interrupt sources in the IP register.
Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two banks of 16-bit Data Pointer Registers are
provided: DP0 at SFR address locations 82H-83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user should always initialize the DPS bit to the appropriate value before accessing the respective Data Pointer Register.
Power Off Flag:The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to “1” during power up. It can be set and rest under software control and is not affected by reset.
Memory Organization
MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.
Program Memory
If the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.
Data Memory
The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space.
When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access of the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2).
MOV 0A0H, #data
Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.
Timer 0 and 1
Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON.
Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.
In the Counter function, the register is incremented in response to a
1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle.
Interrupts
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in Figure 10.
Each of these interrupt sources can be individually enabled or disabled
by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once.
Note that Table 5 shows that bit position IE.6 is unimplemented. In the AT89S52, bit position IE.5 is also unimplemented. User software should not write 1s to these bit positions, since they may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.
二、译文
单片机
单片机即微型计算机，是把中央处理器、存储器、定时/计数器、输入输出接口都集成在一块集成电路芯片上的微型计算机。与应用在个人电脑中的同用型微处理器相比，它更强调自供应（不用外接硬件）和节约成本。它最大的优点是体积小，可放在仪表内部，但存储量小，输入输出接口简单，功能较低。由于其发展非常迅速，但旧的单片机的定义已不能满足，所以在很多应用场合被称为范围更广的微处理器，但是目前在中国大陆仍多沿用“单片机”的称呼。
随着计算机技术的发展和在控制系统中的应用，以及设备小型化、智能化的发展，作为高新技术之一的单片机以其体积小、功能强、价格低廉、使用灵活等优势，展现出很强的生命力。它和一般的集成电路相比有较好的抗干扰能力，对环境的温度和湿度都有较好的适应性，可以在工业条件下稳定工作。且单片机广泛的应用于各种仪器仪表，使仪器仪表智能化，提高它们的测量速度和测量精度，加强控制功能。总之，随着信息时代的到来，传统单片机固有的结构缺陷，使其呈现出诸多弊端。其速度、规模、性能等指标越来越难以满足用户需求、因此单片机芯片的开发，升级面临着新的挑战。
AT89S52概述
AT89S52是一种低功耗、高性能CMOS8位微控制器，具有8K在系统可编程Flash存储器。使用Atmel公司高密度非易失性存储器技术制造，与工业80C51产品指令和引脚完全兼容。片上Flash允许程序存储器在系统可编程，亦适于常规编程器。在单芯片上，拥有灵巧的8位CPU和在系统可编程Flash，使得AT89S52为众多嵌入式控制应用系统提供高灵活、超有效的解决方案。
AT89S52具有以下标准功能：8k字节Flash，256字节RAM，32位I/O口线，看门狗定时器，2个数据指针，三个16位定时器/计数器，一个6向量2级中断结构，全双工串行口，片内晶振及时钟电路。另外，AT89S52可降至0Hz静态逻辑操作，支持2种软件可选择节电模式。空闲模式下，CPU停止工作，允许RAM、定时器/计数器、串口、中断继续工作。掉电保护方式下，RAM内容被保存，振荡器被冻结，单片机一切工作停止，直到下一个中断或硬件复位为止。
主要性能
?与MCS-51单片机产品兼容
?8K字节在系统可编程Flash存储器
?1000次擦写周期
?全静态操作：0Hz～33Hz
?三级加密程序存储器
?32个可编程I/O口线
?三个16位定时器/计数器
?八个中断源
?全双工UART串行通道
?低功耗空闲和掉电模式
?掉电后中断可唤醒
?看门狗定时器
?双数据指针
?掉电标识符
引脚结构
VCC :电源
GND:地
P0口：P0口是一个8位漏极开路的双向I/O口。作为输出口，每位能驱动8个TTL逻辑电平。对P0端口写“1”时，引脚用作高阻抗输入。当访问外部程序和数
据存储器时，P0口也被作为低8位地址/数据复用。在这种模式下，P0具有内部上拉电阻。在flash编程时，P0口也用来接收指令字节；在程序校验时，输出指令字节。程序校验时，需要外部上拉电阻。
P1 口：P1 口是一个具有内部上拉电阻的8 位双向I/O 口，P1 输出缓冲器能驱动4个TTL 逻辑电平。对P1 端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（I IL）。此外，P1.0和P1.2分别作定时器/计数器2的外部计数输入（P1.0/T2）和时器/计数器2的触发输入（P1.1/T2EX）。在flash编程和校验时，P1口接收低8位地址字节。
P2口：P2口是一个具有内部上拉电阻的8位双向I/O口，P2输出缓冲器能驱动4个TTL 逻辑电平。对P2 端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（I IL）。在访问外部程序存储器或用16位地址读取外部数据存储器（例如执行MOVX @DPTR）时，P2口送出高八位地址。在这种应用中，P2口使用很强的内部上拉发送1。在使用8位地址（如MOVX @RI）访问外部数据存储器时，P2口输出P2锁存器的内容。
在flas h编程和校验时，P2口也接收高8位地址字节和一些控制信号。
P3口：P3 口是一个具有内部上拉电阻的8 位双向I/O 口，p2输出缓冲器能驱动4个TTL逻辑电平。对P3端口写“1”时，内部上拉电阻把端口拉高，此时可以作为输入口使用。作为输入使用时，被外部拉低的引脚由于内部电阻的原因，将输出电流（I IL）。P3口亦作为AT89S52特殊功能（第二功能）使用。
在flash编程和校验时，P3口也接收一些控制信号。
RST: 复位输入。晶振工作时，RST脚持续2个机器周期高电平将使单片机复位。看门狗计时完成后，RST脚输出96个晶振周期的高电平。特殊寄存器AUXR(地址8EH)上的DISRTO位可以使此功能无效。DISRTO默认状态下，复位高电平有效。
ALE/PROG：地址锁存控制信号（ALE）是访问外部程序存储器时，锁存低8 位地址的输出脉冲。在flash编程时，此引脚（PROG）也用作编程输入脉冲。
在一般情况下，ALE 以晶振六分之一的固定频率输出脉冲，可用作为外部定时器或时钟使用。然而，特别强调，在每次访问外部数据存储器时，ALE脉冲将会跳过。如果需要，通过将地址为8EH的SFR的第0位置“1”，ALE操作将无效。这一位置“1”，ALE 在执行MOVX 或MOVC指令时有效。否则，ALE 将被微弱拉高。这个ALE使能标志位（地址为8EH的SFR的第0位）的设置对微控制器处于外部执行模式下无效。
PSEN:外部程序存储器选通信号（PSEN）是外部程序存储器选通信号。当 AT89S52从外部程序存储器执行外部代码时，PSEN在每个机器周期被激活两次，而在访问外部数据存储器时，PSEN将不被激活。
EA/VPP:访问外部程序存储器控制信号。为使能从0000H到FFFFH的外部程序存储器读取指令，EA必须接GND。为了执行内部程序指令，EA应该接VCC。在flash 编程期间，EA也接收12伏VPP电压。
XTAL1:振荡器反相放大器和内部时钟发生电路的输入端。
XTAL2:振荡器反相放大器的输出端。
特殊功能寄存器
并不是所有的地址都被定义了。片上没有定义的地址是不能用的。读这些地址，一般将得到一个随机数据；写入的数据将会无效。用户不应该给这些未定义的地址写入数据“1”。由于这些寄存器在将来可能被赋予新的功能，复位后，这些位都为“0”。定时器 2 寄存器：寄存器T2CON 和T2MOD 包含定时器2 的控制位和状态位，寄存器对RCAP2H和RCAP2L是定时器2的捕捉/自动重载寄存器。
中断寄存器：各中断允许位在IE寄存器中，六个中断源的两个优先级也可在IE中设置。
双数据指针寄存器：为了更有利于访问内部和外部数据存储器，系统提供了两路16位数据指针寄存器：位于SFR中82H~83H的DP0和位于84H～85。特殊寄存器AUXR1中DPS＝0 选择DP0；DPS=1 选择DP1。用户应该在访问数据指针寄存器前先初始化DPS至合理的值。
掉电标志位：掉电标志位（POF）位于特殊寄存器PCON的第四位（PCON.4）。上电期间POF置“1”。POF可以软件控制使用与否，但不受复位影响。
存储器结构
MCS-51器件有单独的程序存储器和数据存储器。外部程序存储器和数据存储器都可以64K寻址。
程序存储器：如果EA引脚接地，程序读取只从外部存储器开始。对于89S52，如果EA接VCC，程序读写先从内部存储器（地址为0000H～1FFFH）开始，接着从外部寻址，寻址地址为：2000H~FFFFH。
数据存储器：AT89S52 有256字节片内数据存储器。高128字节与特殊功能寄存器重叠。也就是说高128字节与特殊功能寄存器有相同的地址，而物理上是分开的。
当一条指令访问高于7FH 的地址时，寻址方式决定CPU 访问高128字节RAM
还是特殊功能寄存器空间。直接寻址方式访问特殊功能寄存器（SFR）。例如，下面的直接寻址指令访问0A0H（P2口）存储单元使用间接寻址方式访问高128字节RAM。
MOV 0A0H, #data
例如，下面的间接寻址方式中，R0内容为0A0H，访问的是地址0A0H的寄存器，而不是P2口（它的地址也是0A0H）。
MOV @R0 , #data
堆栈操作也是简介寻址方式。因此，高128字节数据RAM也可用于堆栈空间。
定时器 0 和定时器1
在AT89S52 中，定时器0 和定时器1 的操作与AT89C51 和AT89C52 一样。
定时器 2
定时器2是一个16位定时/计数器，它既可以做定时器，又可以作事件计数器。其工作方式由特殊寄存器T2CON中的C/T2位选择。定时器2有三种工作模式：捕捉方式、自动重载（向下或向上计数）和波特率发生器。工作模式由T2CON中的相关位选择。定时器2有2个8位寄存器：TH2和TL2。在定时工作方式中，每个机器周期，TL2寄存器都会加1。由于一个机器周期由12个晶振周期构成，因此，计数频率就是晶振频率的1/12。
在计数工作方式下，寄存器在相关外部输入角T2发生1至0 的下降沿时增加1。在这种方式下，每个机器周期的S5P2期间采样外部输入。一个机器周期采样到高电平，而下一个周期采样到低电平，计数器将加1。在检测到跳变的这个周期的S3P1期间，新的计数值出现在寄存器中。因为识别1－0的跳变需要2个机器周期（24个晶振周期），所以，最大的计数频率不高于晶振频率的1/24。为了确保给定的电平在改变前采样到一次，电平应该至少在一个完整的机器周期内保持不变。
中断
AT89S52有6个中断源：两个外部中断（INT0 和INT1），三个定时中断（定时器0、1、2）和一个串行中断。每个中断源都可以通过置位或清除特殊寄存器IE 中的相关中断允许控制位分别使得中断源有效或无效。IE还包括一个中断允许总控制位EA，它能一次禁止所有中断。IE.6位是不可用的。对于AT89S52，IE.5位也是不能用的。用户软件不应给这些位写1。它们为AT89系列新产品预留。定时器2可以被寄存器T2CON中的TF2和EXF2的或逻辑触发。程序进入中断服务后，这些标志位都可以由硬件清0。实际上，中断服务程序必须判定是否是TF2 或EXF2激活中断，标志位也
必须由软件清0。定时器0和定时器1标志位TF0 和TF1在计数溢出的那个周期的S5P2被置位。它们的值一直到下一个周期被电路捕捉下来。然而，定时器2 的标志位TF2 在计数溢出的那个周期的S2P2被置位，在同一个周期被电路捕捉下来。
毕业设计（论文）外文文献翻译 文献、资料中文题目：软件开发概念和设计方法文献、资料英文题目： 文献、资料来源： 文献、资料发表（出版）日期： 院（部）： 专业： 班级： 姓名： 学号： 指导教师： 翻译日期： 2017.02.14
外文资料原文 Software Development Concepts and Design Methodologies During the 1960s, ma inframes and higher level programming languages were applied to man y problems including human resource s yste ms,reservation s yste ms, and manufacturing s yste ms. Computers and software were seen as the cure all for man y bu siness issues were some times applied blindly. S yste ms sometimes failed to solve the problem for which the y were designed for man y reasons including: ?Inability to sufficiently understand complex problems ?Not sufficiently taking into account end-u ser needs, the organizational environ ment, and performance tradeoffs ?Inability to accurately estimate development time and operational costs ?Lack of framework for consistent and regular customer communications At this time, the concept of structured programming, top-down design, stepwise refinement，and modularity e merged. Structured programming is still the most dominant approach to software engineering and is still evo lving. These failures led to the concept of "software engineering" based upon the idea that an engineering-like discipl ine could be applied to software design and develop ment. Software design is a process where the software designer applies techniques and principles to produce a conceptual model that de scribes and defines a solution to a problem. In the beginning, this des ign process has not been well structured and the model does not alwa ys accurately represent the problem of software development. However,design methodologies have been evolving to accommo date changes in technolog y coupled with our increased understanding of development processes. Whereas early desig n methods addressed specific aspects of the
Inventory management Inventory Control On the so-called "inventory control", many people will interpret it as a "storage management", which is actually a big distortion. The traditional narrow view, mainly for warehouse inventory control of materials for inventory, data processing, storage, distribution, etc., through the implementation of anti-corrosion, temperature and humidity control means, to make the custody of the physical inventory to maintain optimum purposes. This is just a form of inventory control, or can be defined as the physical inventory control. How, then, from a broad perspective to understand inventory control? Inventory control should be related to the company's financial and operational objectives, in particular operating cash flow by optimizing the entire demand and supply chain management processes (DSCM), a reasonable set of ERP control strategy, and supported by appropriate information processing tools, tools to achieved in ensuring the timely delivery of the premise, as far as possible to reduce inventory levels, reducing inventory and obsolescence, the risk of devaluation. In this sense, the physical inventory control to achieve financial goals is just a means to control the entire inventory or just a necessary part; from the perspective of organizational functions, physical inventory control, warehouse management is mainly the responsibility of The broad inventory control is the demand and supply chain management, and the whole company's responsibility. Why until now many people's understanding of inventory control, limited physical inventory control? The following two reasons can not be ignored: First, our enterprises do not attach importance to inventory control. Especially those who benefit relatively good business, as long as there is money on the few people to consider the problem of inventory turnover. Inventory control is simply interpreted as warehouse management, unless the time to spend money, it may have been to see the inventory problem, and see the results are often very simple procurement to buy more, or did not do warehouse departments . Second, ERP misleading. Invoicing software is simple audacity to call it ERP, companies on their so-called ERP can reduce the number of inventory, inventory control, seems to rely on their small software can get. Even as SAP, BAAN ERP world, the field of
Statistical hypothesis testing Adriana Albu，Loredana Ungureanu Politehnica University Timisoara,adrianaa@aut.utt.ro Politehnica University Timisoara,loredanau@aut.utt.ro Abstract In this article,we present a Bayesian statistical hypothesis testing inspection, testing theory and the process Mentioned hypothesis testing in the real world and the importance of, and successful test of the Notes. Key words Bayesian hypothesis testing; Bayesian inference;Test of significance Introduction A statistical hypothesis test is a method of making decisions using data, whether from a controlled experiment or an observational study (not controlled). In statistics, a result is called statistically significant if it is unlikely to have occurred by chance alone, according to a pre-determined threshold probability, the significance level. The phrase "test of significance" was coined by Ronald Fisher: "Critical tests of this kind may be called tests of significance, and when such tests are available we may discover whether a second sample is or is not significantly different from the first."[1] Hypothesis testing is sometimes called confirmatory data analysis, in contrast to exploratory data analysis. In frequency probability,these decisions are almost always made using null-hypothesis tests. These are tests that answer the question Assuming that the null hypothesis is true, what is the probability of observing a value for the test statistic that is at [] least as extreme as the value that was actually observed?) 2 More formally, they represent answers to the question, posed before undertaking an experiment,of what outcomes of the experiment would lead to rejection of the null hypothesis for a pre-specified probability of an incorrect rejection. One use of hypothesis testing is deciding whether experimental results contain enough information to cast doubt on conventional wisdom. Statistical hypothesis testing is a key technique of frequentist statistical inference. The Bayesian approach to hypothesis testing is to base rejection of the hypothesis on the posterior probability.[3][4]Other approaches to reaching a decision based on data are available via decision theory and optimal decisions. The critical region of a hypothesis test is the set of all outcomes which cause the null hypothesis to be rejected in favor of the alternative hypothesis. The critical region is usually denoted by the letter C. One-sample tests are appropriate when a sample is being compared to the population from a hypothesis. The population characteristics are known from theory or are calculated from the population.
外文出处： 《Exploiting Software How to Break Code》By Greg Hoglund, Gary McGraw Publisher : Addison Wesley Pub Date : February 17, 2004 ISBN : 0-201-78695-8 译文标题： JDBC接口技术 译文： JDBC是一种可用于执行SQL语句的JavaAPI（ApplicationProgrammingInterface应用程序设计接口）。它由一些Java语言编写的类和界面组成。JDBC为数据库应用开发人员、数据库前台工具开发人员提供了一种标准的应用程序设计接口，使开发人员可以用纯Java语言编写完整的数据库应用程序。 一、ODBC到JDBC的发展历程 说到JDBC，很容易让人联想到另一个十分熟悉的字眼“ODBC”。它们之间有没有联系呢？如果有，那么它们之间又是怎样的关系呢？ ODBC是OpenDatabaseConnectivity的英文简写。它是一种用来在相关或不相关的数据库管理系统（DBMS）中存取数据的，用C语言实现的，标准应用程序数据接口。通过ODBCAPI，应用程序可以存取保存在多种不同数据库管理系统（DBMS）中的数据，而不论每个DBMS使用了何种数据存储格式和编程接口。 1．ODBC的结构模型 ODBC的结构包括四个主要部分：应用程序接口、驱动器管理器、数据库驱动器和数据源。应用程序接口：屏蔽不同的ODBC数据库驱动器之间函数调用的差别，为用户提供统一的SQL编程接口。 驱动器管理器：为应用程序装载数据库驱动器。 数据库驱动器：实现ODBC的函数调用，提供对特定数据源的SQL请求。如果需要，数据库驱动器将修改应用程序的请求，使得请求符合相关的DBMS所支持的文法。 数据源：由用户想要存取的数据以及与它相关的操作系统、DBMS和用于访问DBMS的网络平台组成。 虽然ODBC驱动器管理器的主要目的是加载数据库驱动器，以便ODBC函数调用，但是数据库驱动器本身也执行ODBC函数调用，并与数据库相互配合。因此当应用系统发出调用与数据源进行连接时，数据库驱动器能管理通信协议。当建立起与数据源的连接时，数据库驱动器便能处理应用系统向DBMS发出的请求，对分析或发自数据源的设计进行必要的翻译，并将结果返回给应用系统。 2．JDBC的诞生 自从Java语言于1995年5月正式公布以来，Java风靡全球。出现大量的用java语言编写的程序，其中也包括数据库应用程序。由于没有一个Java语言的API，编程人员不得不在Java程序中加入C语言的ODBC函数调用。这就使很多Java的优秀特性无法充分发挥，比如平台无关性、面向对象特性等。随着越来越多的编程人员对Java语言的日益喜爱，越来越多的公司在Java程序开发上投入的精力日益增加，对java语言接口的访问数据库的API 的要求越来越强烈。也由于ODBC的有其不足之处，比如它并不容易使用，没有面向对象的特性等等，SUN公司决定开发一Java语言为接口的数据库应用程序开发接口。在JDK1．x 版本中，JDBC只是一个可选部件，到了JDK1．1公布时，SQL类包（也就是JDBCAPI）
外文翻译 专业机械设计制造及其自动化学生姓名刘链柱 班级机制111 学号1110101102 指导教师葛友华
外文资料名称： Design and performance evaluation of vacuum cleaners using cyclone technology 外文资料出处：Korean J. Chem. Eng., 23(6), (用外文写) 925-930 (2006) 附件： 1.外文资料翻译译文 2.外文原文
应用旋风技术真空吸尘器的设计和性能介绍 吉尔泰金，洪城铱昌，宰瑾李， 刘链柱译 摘要：旋风型分离器技术用于真空吸尘器 - 轴向进流旋风和切向进气道流旋风有效地收集粉尘和降低压力降已被实验研究。优化设计等因素作为集尘效率，压降，并切成尺寸被粒度对应于分级收集的50％的效率进行了研究。颗粒切成大小降低入口面积，体直径，减小涡取景器直径的旋风。切向入口的双流量气旋具有良好的性能考虑的350毫米汞柱的低压降和为1.5μm的质量中位直径在1米3的流量的截止尺寸。一使用切向入口的双流量旋风吸尘器示出了势是一种有效的方法，用于收集在家庭中产生的粉尘。 摘要及关键词：吸尘器; 粉尘; 旋风分离器 引言 我们这个时代的很大一部分都花在了房子，工作场所，或其他建筑，因此，室内空间应该是既舒适情绪和卫生。但室内空气中含有超过室外空气因气密性的二次污染物，毒物，食品气味。这是通过使用产生在建筑中的新材料和设备。真空吸尘器为代表的家电去除有害物质从地板到地毯所用的商用真空吸尘器房子由纸过滤，预过滤器和排气过滤器通过洁净的空气排放到大气中。虽然真空吸尘器是方便在使用中，吸入压力下降说唱空转成比例地清洗的时间，以及纸过滤器也应定期更换，由于压力下降，气味和细菌通过纸过滤器内的残留粉尘。 图1示出了大气气溶胶的粒度分布通常是双峰形，在粗颗粒（>2.0微米）模式为主要的外部来源，如风吹尘，海盐喷雾，火山，从工厂直接排放和车辆废气排放，以及那些在细颗粒模式包括燃烧或光化学反应。表1显示模式，典型的大气航空的直径和质量浓度溶胶被许多研究者测量。精细模式在0.18?0.36 在5.7到25微米尺寸范围微米尺寸范围。质量浓度为2?205微克，可直接在大气气溶胶和 3.85至36.3μg/m3柴油气溶胶。
毕业设计（论文） 外文文献译文及原文 学生：李树森 学号：201006090217 院（系）：电气与信息工程学院 专业：网络工程 指导教师：王立梅 2014年06月10日
JSP的技术发展历史 作者：Kathy Sierra and Bert Bates 来源：Servlet&JSP Java Server Pages(JSP)是一种基于web的脚本编程技术，类似于网景公司的服务器端Java脚本语言—— server-side JavaScript(SSJS)和微软的Active Server Pages(ASP)。与SSJS和ASP相比，JSP具有更好的可扩展性，并且它不专属于任何一家厂商或某一特定的Web服务器。尽管JSP规范是由Sun 公司制定的，但任何厂商都可以在自己的系统上实现JSP。 在Sun正式发布JSP之后，这种新的Web应用开发技术很快引起了人们的关注。JSP为创建高度动态的Web应用提供了一个独特的开发环境。按照Sun的说法，JSP能够适应市场上包括Apache WebServer、IIS4.0在内的85%的服务器产品。 本文将介绍JSP相关的知识，以及JavaBean的相关内容，当然都是比较粗略的介绍其中的基本内容，仅仅起到抛砖引玉的作用，如果读者需要更详细的信息，请参考相应的JSP的书籍。 1.1 概述 JSP(Java Server Pages)是由Sun Microsystems公司倡导、许多公司参与一起建立的一种动态网页技术标准，其在动态网页的建设中有其强大而特别的功能。JSP与Microsoft的ASP技术非常相似。两者都提供在HTML代码中混合某种程序代码、由语言引擎解释执行程序代码的能力。下面我们简单的对它进行介绍。 JSP页面最终会转换成servlet。因而，从根本上，JSP页面能够执行的任何任务都可以用servlet 来完成。然而，这种底层的等同性并不意味着servlet和JSP页面对于所有的情况都等同适用。问题不在于技术的能力，而是二者在便利性、生产率和可维护性上的不同。毕竟，在特定平台上能够用Java 编程语言完成的事情，同样可以用汇编语言来完成，但是选择哪种语言依旧十分重要。 和单独使用servlet相比，JSP提供下述好处： JSP中HTML的编写与维护更为简单。JSP中可以使用常规的HTML：没有额外的反斜杠，没有额外的双引号，也没有暗含的Java语法。 能够使用标准的网站开发工具。即使是那些对JSP一无所知的HTML工具，我们也可以使用，因为它们会忽略JSP标签。 可以对开发团队进行划分。Java程序员可以致力于动态代码。Web开发人员可以将经理集中在表示层上。对于大型的项目，这种划分极为重要。依据开发团队的大小，及项目的复杂程度，可以对静态HTML和动态内容进行弱分离和强分离。 此处的讨论并不是说人们应该放弃使用servlet而仅仅使用JSP。事实上，几乎所有的项目都会同时用到这两种技术。在某些项目中，更适宜选用servlet，而针对项目中的某些请求，我们可能会在MVC构架下组合使用这两项技术。我们总是希望用适当的工具完成相对应的工作，仅仅是servlet并不一定能够胜任所有工作。 1.2 JSP的由来 Sun公司的JSP技术，使Web页面开发人员可以使用HTML或者XML标识来设计和格式化最终
吉林化工学院理学院 毕业论文外文翻译English Title（Times New Roman ，三号） 学生学号：08810219 学生姓名：袁庚文 专业班级：信息与计算科学0802 指导教师：赵瑛 职称副教授 起止日期：2012.2.27～2012.3.14 吉林化工学院 Jilin Institute of Chemical Technology
1 外文翻译的基本内容 应选择与本课题密切相关的外文文献（学术期刊网上的），译成中文，与原文装订在一起并独立成册。在毕业答辩前，同论文一起上交。译文字数不应少于3000个汉字。 2 书写规范 2.1 外文翻译的正文格式 正文版心设置为：上边距：3.5厘米，下边距：2.5厘米，左边距：3.5厘米，右边距：2厘米，页眉：2.5厘米，页脚：2厘米。 中文部分正文选用模板中的样式所定义的“正文”，每段落首行缩进2字；或者手动设置成每段落首行缩进2字，字体：宋体，字号：小四，行距：多倍行距1.3，间距：前段、后段均为0行。 这部分工作模板中已经自动设置为缺省值。 2.2标题格式 特别注意：各级标题的具体形式可参照外文原文确定。 1．第一级标题（如：第1章绪论）选用模板中的样式所定义的“标题1”，居左；或者手动设置成字体：黑体，居左，字号：三号，1.5倍行距，段后11磅，段前为11磅。 2．第二级标题（如：1.2 摘要与关键词）选用模板中的样式所定义的“标题2”，居左；或者手动设置成字体：黑体，居左，字号：四号，1.5倍行距，段后为0，段前0.5行。 3．第三级标题（如：1.2.1 摘要）选用模板中的样式所定义的“标题3”，居左；或者手动设置成字体：黑体，居左，字号：小四，1.5倍行距，段后为0，段前0.5行。 标题和后面文字之间空一格（半角）。 3 图表及公式等的格式说明 图表、公式、参考文献等的格式详见《吉林化工学院本科学生毕业设计说明书（论文）撰写规范及标准模版》中相关的说明。
软件专业毕业论文外文文献中英文翻译 Object landscapes and lifetimes Tech nically, OOP is just about abstract data typing, in herita nee, and polymorphism, but other issues can be at least as importa nt. The rema in der of this sect ion will cover these issues. One of the most importa nt factors is the way objects are created and destroyed. Where is the data for an object and how is the lifetime of the object con trolled? There are differe nt philosophies at work here. C++ takes the approach that con trol of efficie ncy is the most importa nt issue, so it gives the programmer a choice. For maximum run-time speed, the storage and lifetime can be determined while the program is being written, by placing the objects on the stack (these are sometimes called automatic or scoped variables) or in the static storage area. This places a priority on the speed of storage allocatio n and release, and con trol of these can be very valuable in some situati ons. However, you sacrifice flexibility because you must know the exact qua ntity, lifetime, and type of objects while you're writing the program. If you are trying to solve a more general problem such as computer-aided desig n, warehouse man ageme nt, or air-traffic con trol, this is too restrictive. The sec ond approach is to create objects dyn amically in a pool of memory called the heap. In this approach, you don't know un til run-time how many objects you n eed, what their lifetime is, or what their exact type is. Those are determined at the spur of the moment while the program is runnin g. If you n eed a new object, you simply make it on the heap at the point that you n eed it. Because the storage is man aged dyn amically, at run-time, the amount of time required to allocate storage on the heap is sig ni fica ntly Ion ger tha n the time to create storage on the stack. (Creat ing storage on the stack is ofte n a si ngle assembly in structio n to move the stack poin ter dow n, and ano ther to move it back up.) The dyn amic approach makes the gen erally logical assumpti on that objects tend to be complicated, so the extra overhead of finding storage and releas ing that storage will not have an importa nt impact on the creati on of an object .In additi on, the greater flexibility is esse ntial to solve the gen eral program ming problem. Java uses the sec ond approach, exclusive". Every time you want to create an object, you use the new keyword to build a dyn amic in sta nee of that object. There's ano ther issue, however, and that's the lifetime of an object. With Ian guages that allow objects to be created on the stack, the compiler determines how long the object lasts and can automatically destroy it. However, if you create it on the heap the compiler has no kno wledge of its lifetime. In a Ianguage like C++, you must determine programmatically when to destroy the
Optimum blank design of an automobile sub-frame Jong-Yop Kim a ,Naksoo Kim a,*,Man-Sung Huh b a Department of Mechanical Engineering,Sogang University,Shinsu-dong 1,Mapo-ku,Seoul 121-742,South Korea b Hwa-shin Corporation,Young-chun,Kyung-buk,770-140,South Korea Received 17July 1998 Abstract A roll-back method is proposed to predict the optimum initial blank shape in the sheet metal forming process.The method takes the difference between the ?nal deformed shape and the target contour shape into account.Based on the method,a computer program composed of a blank design module,an FE-analysis program and a mesh generation module is developed.The roll-back method is applied to the drawing of a square cup with the ˉange of uniform size around its periphery,to con?rm its validity.Good agreement is recognized between the numerical results and the published results for initial blank shape and thickness strain distribution.The optimum blank shapes for two parts of an automobile sub-frame are designed.Both the thickness distribution and the level of punch load are improved with the designed blank.Also,the method is applied to design the weld line in a tailor-welded blank.It is concluded that the roll-back method is an effective and convenient method for an optimum blank shape design.#2000Elsevier Science S.A.All rights reserved. Keywords:Blank design;Sheet metal forming;Finite element method;Roll-back method
毕业论文外文文献 Photography Pen Film director and critic Alexander Astruc's comments in today, wrote a famous: "Following a variety of other arts, especially painting, novel, film is rapidly becoming a tool to express ideas. It swept the market, a mall next to the theater's entertainment products. It is a well preserved image of the times methods. Now is gradually becoming a language, that is, the artist can use it to express themselves through a means of thinking, no matter how abstract this idea, or that it is also used as a kind of artists like prose or fiction a form to express their themes. So, I put this new era for film today called "photo pen" era, that era of writing, the use of the camera …… "Silent film attempts to use symbolic links to all the concept and meaning of the expression. We know, Lenovo exist in the image itself, naturally present in the film development process, there is the role of performance in each posture and expression, present in every word of in; also present in the camera movement, this movement linked to a piece of things, to link people and things …… "Obviously, that is, screenwriter making his own films. Or even say that there is no longer what the movie writer. Because, in such films, the playwright and director, there is nothing between significant
毕业论文（设计）外文翻译 题目：中国上市公司偏好股权融资：非制度性因素 系部名称：经济管理系专业班级:会计082班 学生姓名：任民学号： 200880444228 指导教师：冯银波教师职称:讲师 年月日
译文： 中国上市公司偏好股权融资：非制度性因素 国际商业管理杂志 2009.10 摘要：本文把重点集中于中国上市公司的融资活动，运用西方融资理论，从非制度性因素方面，如融资成本、企业资产类型和质量、盈利能力、行业因素、股权结构因素、财务管理水平和社会文化，分析了中国上市公司倾向于股权融资的原因，并得出结论，股权融资偏好是上市公司根据中国融资环境的一种合理的选择。最后，针对公司的股权融资偏好提出了一些简明的建议。 关键词：股权融资，非制度性因素，融资成本 一、前言 中国上市公司偏好于股权融资，根据中国证券报的数据显示，1997年上市公司在资本市场的融资金额为95.87亿美元，其中股票融资的比例是72.5％，，在1998年和1999年比例分别为72.6％和72.3％，另一方面，债券融资的比例分别是17.8％，24.9％和25.1％。在这三年，股票融资的比例，在比中国发达的资本市场中却在下跌。以美国为例，当美国企业需要的资金在资本市场上，于股权融资相比他们宁愿选择债券融资。统计数据显示，从1970年到1985年，美日企业债券融资占了境外融资的91.7％，比股权融资高很多。阎达五等发现，大约中国3/4的上市公司偏好于股权融资。许多研究的学者认为，上市公司按以下顺序进行外部融资：第一个是股票基金，第二个是可转换债券，三是短期债务，最后一个是长期负债。许多研究人员通常分析我国上市公司偏好股权是由于我们国家的经济改革所带来的制度性因素。他们认为，上市公司的融资活动违背了西方古典融资理论只是因为那些制度性原因。例如，优序融资理论认为，当企业需要资金时，他们首先应该转向内部资金（折旧和留存收益），然后再进行债权融资，最后的选择是股票融资。在这篇文章中，笔者认为，这是因为具体的金融环境激活了企业的这种偏好，并结合了非制度性因素和西方金融理论，尝试解释股权融资偏好的原因。
毕业设计（论文） 外文翻译 题目西安市水源工程中的 水电站设计 专业水利水电工程 班级 学生 指导教师 2016年
研究钢弧形闸门的动态稳定性 牛志国 河海大学水利水电工程学院，中国南京，邮编210098 nzg_197901@https://www.doczj.com/doc/4c14598016.html,，niuzhiguo@https://www.doczj.com/doc/4c14598016.html, 李同春 河海大学水利水电工程学院，中国南京，邮编210098 ltchhu@https://www.doczj.com/doc/4c14598016.html, 摘要 由于钢弧形闸门的结构特征和弹力，调查对参数共振的弧形闸门的臂一直是研究领域的热点话题弧形弧形闸门的动力稳定性。在这个论文中，简化空间框架作为分析模型，根据弹性体薄壁结构的扰动方程和梁单元模型和薄壁结构的梁单元模型，动态不稳定区域的弧形闸门可以通过有限元的方法，应用有限元的方法计算动态不稳定性的主要区域的弧形弧形闸门工作。此外，结合物理和数值模型，对识别新方法的参数共振钢弧形闸门提出了调查，本文不仅是重要的改进弧形闸门的参数振动的计算方法，但也为进一步研究弧形弧形闸门结构的动态稳定性打下了坚实的基础。 简介 低举升力，没有门槽，好流型，和操作方便等优点，使钢弧形闸门已经广泛应用于水工建筑物。弧形闸门的结构特点是液压完全作用于弧形闸门，通过门叶和主大梁，所以弧形闸门臂是主要的组件确保弧形闸门安全操作。如果周期性轴向载荷作用于手臂，手臂的不稳定是在一定条件下可能发生。调查指出:在弧形闸门的20次事故中，除了极特殊的破坏情况下，弧形闸门的破坏的原因是弧形闸门臂的不稳定;此外，明显的动态作用下发生破坏。例如:张山闸，位于中国的江苏省，包括36个弧形闸门。当一个弧形闸门打开放水时，门被破坏了，而其他弧形闸门则关闭，受到静态静水压力仍然是一样的，很明显，一个动态的加载是造成的弧形闸门破坏一个主要因素。因此弧形闸门臂的动态不稳定是造成弧形闸门(特别是低水头的弧形闸门)破坏的主要原是毫无疑问。